diff options
author | Lionel Landwerlin <[email protected]> | 2017-10-03 16:05:07 +0100 |
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committer | Lionel Landwerlin <[email protected]> | 2017-10-03 22:50:46 +0100 |
commit | d3acc240d0ced4efefd18e8c26510bd6a638c9df (patch) | |
tree | a0c16ea401fc162bbda0a6e0ced3ff3335673d64 | |
parent | 8733567e056360fbad7d99f56a64279957bdcf06 (diff) |
intel: compiler: vec4: add missing default 0 lod
We set a similar default value for LOD in the fs backend for TXS/TXL.
Without this we end up generating invalid MOV with a null src.
Signed-off-by: Lionel Landwerlin <[email protected]>
Cc: "17.2 17.1" <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
-rw-r--r-- | src/intel/compiler/brw_vec4_nir.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_vec4_nir.cpp b/src/intel/compiler/brw_vec4_nir.cpp index 0a1caa9fad8..9200ffa0ed7 100644 --- a/src/intel/compiler/brw_vec4_nir.cpp +++ b/src/intel/compiler/brw_vec4_nir.cpp @@ -2228,6 +2228,15 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr) } } + /* TXS and TXL require a LOD but not everything we implement using those + * two opcodes provides one. Provide a default LOD of 0. + */ + if ((instr->op == nir_texop_txs || + instr->op == nir_texop_txl) && + lod.file == BAD_FILE) { + lod = brw_imm_ud(0u); + } + if (instr->op == nir_texop_txf_ms || instr->op == nir_texop_samples_identical) { assert(coord_type != NULL); |