diff options
| author | Kenneth Graunke <[email protected]> | 2014-09-01 01:39:14 -0700 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2014-10-15 17:04:43 -0700 |
| commit | cee2027574579d63cdf9693156542e7862b27131 (patch) | |
| tree | 525dd3c17c44475a0ca62a370f48d1d6be3cc978 | |
| parent | a2c3cfbb4d9547f2faa44df4ca996095ce852b9e (diff) | |
i965: Drop ir->op != ir_txf condition in offset checking.
brw_lower_unnormalized_offset sets ir->offset to NULL if it applies the
texelFetchOffset workarounds, so there's no need to special case it
here---there won't be an offset for ir_txf.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Chris Forbes <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 5 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 2 |
2 files changed, 3 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 52771e97634..163d6423d9e 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -1492,8 +1492,7 @@ fs_visitor::emit_texture_gen7(ir_texture *ir, fs_reg dst, fs_reg coordinate, } int length = 0; - if (ir->op == ir_tg4 || (ir->offset && ir->op != ir_txf) || - is_high_sampler(brw, sampler)) { + if (ir->op == ir_tg4 || ir->offset || is_high_sampler(brw, sampler)) { /* For general texture offsets (no txf workaround), we need a header to * put them in. Note that for SIMD16 we're making space for two actual * hardware registers here, so the emit will have to fix up for this. @@ -1989,7 +1988,7 @@ fs_visitor::visit(ir_texture *ir) lod, lod2, sampler); } - if (ir->offset != NULL && ir->op != ir_txf) + if (ir->offset != NULL) inst->texture_offset = brw_texture_offset(ctx, ir->offset->as_constant()); if (ir->op == ir_tg4) diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index ef923ddcc03..88ec79e98f1 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -2552,7 +2552,7 @@ vec4_visitor::visit(ir_texture *ir) vec4_instruction *inst = new(mem_ctx) vec4_instruction(this, opcode); - if (ir->offset != NULL && ir->op != ir_txf) + if (ir->offset != NULL) inst->texture_offset = brw_texture_offset(ctx, ir->offset->as_constant()); /* Stuff the channel select bits in the top of the texture offset */ |