diff options
| author | Ilia Mirkin <[email protected]> | 2014-08-06 01:22:49 -0400 |
|---|---|---|
| committer | Ilia Mirkin <[email protected]> | 2014-08-11 19:07:34 -0400 |
| commit | af3619e88043ce85560b8220dc16244f8898a926 (patch) | |
| tree | 54920d0c082e43da5f1ae95d479ec48e461850e2 | |
| parent | f73594778b0ef9804fc7839d5e2051d051d4ef48 (diff) | |
nvc0/ir: add base tex offset for fermi indirect tex case
Signed-off-by: Ilia Mirkin <[email protected]>
| -rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index f010767e18a..4a9e48f7f6f 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -603,10 +603,18 @@ NVC0LoweringPass::handleTEX(TexInstruction *i) Value *ticRel = i->getIndirectR(); Value *tscRel = i->getIndirectS(); - if (ticRel) + if (ticRel) { i->setSrc(i->tex.rIndirectSrc, NULL); - if (tscRel) + if (i->tex.r) + ticRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), + ticRel, bld.mkImm(i->tex.r)); + } + if (tscRel) { i->setSrc(i->tex.sIndirectSrc, NULL); + if (i->tex.s) + tscRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(), + tscRel, bld.mkImm(i->tex.s)); + } Value *arrayIndex = i->tex.target.isArray() ? i->getSrc(lyr) : NULL; for (int s = dim; s >= 1; --s) |