diff options
author | Jason Ekstrand <[email protected]> | 2016-03-01 13:51:50 -0800 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2016-03-01 13:51:58 -0800 |
commit | eecd1f80011701de6174f22106014910c9c79484 (patch) | |
tree | 18d2266e60ddb20f638c30fa86c1877f76f3325a | |
parent | 8b091deb5e229dd67c7b9c72d511d3eaa7c9b7d9 (diff) |
gen7/pipeline: Add competent blending
This is mostly a copy-and-paste from gen8. Blending still isn't 100% but
it fixes about 1100 CTS blend tests on HSW.
-rw-r--r-- | src/intel/vulkan/gen7_pipeline.c | 88 |
1 files changed, 45 insertions, 43 deletions
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index c356fed7d68..7d283f18f40 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan/gen7_pipeline.c @@ -123,50 +123,52 @@ gen7_emit_cb_state(struct anv_pipeline *pipeline, .WriteDisableGreen = true, .WriteDisableBlue = true); } else { - /* FIXME-GEN7: All render targets share blend state settings on gen7, we - * can't implement this. - */ const VkPipelineColorBlendAttachmentState *a = &info->pAttachments[0]; - pipeline->blend_state = - anv_state_pool_emit(&device->dynamic_state_pool, - GENX(BLEND_STATE), 64, - - .ColorBufferBlendEnable = a->blendEnable, - .IndependentAlphaBlendEnable = true, /* FIXME: yes? */ - .AlphaBlendFunction = vk_to_gen_blend_op[a->alphaBlendOp], - - .SourceAlphaBlendFactor = vk_to_gen_blend[a->srcAlphaBlendFactor], - .DestinationAlphaBlendFactor = vk_to_gen_blend[a->dstAlphaBlendFactor], - - .ColorBlendFunction = vk_to_gen_blend_op[a->colorBlendOp], - .SourceBlendFactor = vk_to_gen_blend[a->srcColorBlendFactor], - .DestinationBlendFactor = vk_to_gen_blend[a->dstColorBlendFactor], - .AlphaToCoverageEnable = ms_info && ms_info->alphaToCoverageEnable, - -# if 0 - bool AlphaToOneEnable; - bool AlphaToCoverageDitherEnable; -# endif - - .WriteDisableAlpha = !(a->colorWriteMask & VK_COLOR_COMPONENT_A_BIT), - .WriteDisableRed = !(a->colorWriteMask & VK_COLOR_COMPONENT_R_BIT), - .WriteDisableGreen = !(a->colorWriteMask & VK_COLOR_COMPONENT_G_BIT), - .WriteDisableBlue = !(a->colorWriteMask & VK_COLOR_COMPONENT_B_BIT), - - .LogicOpEnable = info->logicOpEnable, - .LogicOpFunction = vk_to_gen_logic_op[info->logicOp], - -# if 0 - bool AlphaTestEnable; - uint32_t AlphaTestFunction; - bool ColorDitherEnable; - uint32_t XDitherOffset; - uint32_t YDitherOffset; - uint32_t ColorClampRange; - bool PreBlendColorClampEnable; - bool PostBlendColorClampEnable; -# endif - ); + struct GENX(BLEND_STATE) blend = { + .AlphaToCoverageEnable = ms_info && ms_info->alphaToCoverageEnable, + .AlphaToOneEnable = ms_info && ms_info->alphaToOneEnable, + + .LogicOpEnable = info->logicOpEnable, + .LogicOpFunction = vk_to_gen_logic_op[info->logicOp], + .ColorBufferBlendEnable = a->blendEnable, + .ColorClampRange = COLORCLAMP_RTFORMAT, + .PreBlendColorClampEnable = true, + .PostBlendColorClampEnable = true, + .SourceBlendFactor = vk_to_gen_blend[a->srcColorBlendFactor], + .DestinationBlendFactor = vk_to_gen_blend[a->dstColorBlendFactor], + .ColorBlendFunction = vk_to_gen_blend_op[a->colorBlendOp], + .SourceAlphaBlendFactor = vk_to_gen_blend[a->srcAlphaBlendFactor], + .DestinationAlphaBlendFactor = vk_to_gen_blend[a->dstAlphaBlendFactor], + .AlphaBlendFunction = vk_to_gen_blend_op[a->alphaBlendOp], + .WriteDisableAlpha = !(a->colorWriteMask & VK_COLOR_COMPONENT_A_BIT), + .WriteDisableRed = !(a->colorWriteMask & VK_COLOR_COMPONENT_R_BIT), + .WriteDisableGreen = !(a->colorWriteMask & VK_COLOR_COMPONENT_G_BIT), + .WriteDisableBlue = !(a->colorWriteMask & VK_COLOR_COMPONENT_B_BIT), + }; + + /* Our hardware applies the blend factor prior to the blend function + * regardless of what function is used. Technically, this means the + * hardware can do MORE than GL or Vulkan specify. However, it also + * means that, for MIN and MAX, we have to stomp the blend factor to + * ONE to make it a no-op. + */ + if (a->colorBlendOp == VK_BLEND_OP_MIN || + a->colorBlendOp == VK_BLEND_OP_MAX) { + blend.SourceBlendFactor = BLENDFACTOR_ONE; + blend.DestinationBlendFactor = BLENDFACTOR_ONE; + } + if (a->alphaBlendOp == VK_BLEND_OP_MIN || + a->alphaBlendOp == VK_BLEND_OP_MAX) { + blend.SourceAlphaBlendFactor = BLENDFACTOR_ONE; + blend.DestinationAlphaBlendFactor = BLENDFACTOR_ONE; + } + + pipeline->blend_state = anv_state_pool_alloc(&device->dynamic_state_pool, + GENX(BLEND_STATE_length) * 4, + 64); + GENX(BLEND_STATE_pack)(NULL, pipeline->blend_state.map, &blend); + if (pipeline->device->info.has_llc) + anv_state_clflush(pipeline->blend_state); } anv_batch_emit(&pipeline->batch, GENX(3DSTATE_BLEND_STATE_POINTERS), |