diff options
| author | Matt Turner <[email protected]> | 2015-10-20 17:51:12 -0700 |
|---|---|---|
| committer | Matt Turner <[email protected]> | 2015-10-22 12:26:49 -0700 |
| commit | e10fc055e7dc5281f03a77088a24392098e3473b (patch) | |
| tree | 6729280306014c76e036ac1ce24976f56ca31448 | |
| parent | cfb67c3d0656927270302ef17d2d9de065ec44fe (diff) | |
i965/fs: Use type-W for immediate in SampleID setup.
Not a functional difference, but register is loaded with a signed
immediate (V) and added to a signed type (D) producing a signed result
(D).
Also change the type of g0 to allow for compaction.
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 1c96cf2d85b..3cb8190b02a 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -1284,7 +1284,7 @@ fs_visitor::emit_sampleid_setup() if (key->compute_sample_id) { fs_reg t1 = vgrf(glsl_type::int_type); fs_reg t2 = vgrf(glsl_type::int_type); - t2.type = BRW_REGISTER_TYPE_UW; + t2.type = BRW_REGISTER_TYPE_W; /* The PS will be run in MSDISPMODE_PERSAMPLE. For example with * 8x multisampling, subspan 0 will represent sample N (where N @@ -1306,7 +1306,7 @@ fs_visitor::emit_sampleid_setup() * subspan 1, and finally sample 1 of subspan 1. */ abld.exec_all() - .AND(t1, fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD)), + .AND(t1, fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_D)), fs_reg(0xc0)); abld.exec_all().SHR(t1, t1, fs_reg(5)); diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index b016b5684e7..20461e8bc5b 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -1508,7 +1508,7 @@ fs_generator::generate_set_sample_id(fs_inst *inst, brw_set_default_exec_size(p, BRW_EXECUTE_8); brw_set_default_compression_control(p, BRW_COMPRESSION_NONE); brw_set_default_mask_control(p, BRW_MASK_DISABLE); - struct brw_reg reg = retype(stride(src1, 1, 4, 0), BRW_REGISTER_TYPE_UW); + struct brw_reg reg = stride(src1, 1, 4, 0); if (dispatch_width == 8) { brw_ADD(p, dst, src0, reg); } else if (dispatch_width == 16) { |