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authorEric Anholt <[email protected]>2008-02-07 12:09:16 -0800
committerEric Anholt <[email protected]>2008-02-07 13:14:59 -0800
commit70908a793b7755c973fe024844185ff9e14924ea (patch)
tree51a3b5fd9c1baba4401a6d0462123760512e027a
parent5c0c8831040c2abbe4e1f80cb03a8cc1ffd4219e (diff)
[965] Flush icache on new batch, not just new context.
This is required since our buffer manager may now move our instruction-containing buffers at any batchbuffer emit.
-rw-r--r--src/mesa/drivers/dri/i965/brw_misc_state.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c
index 8277da7dd30..450d62c71f8 100644
--- a/src/mesa/drivers/dri/i965/brw_misc_state.c
+++ b/src/mesa/drivers/dri/i965/brw_misc_state.c
@@ -394,7 +394,7 @@ static void upload_pipe_control(struct brw_context *brw)
const struct brw_tracked_state brw_pipe_control = {
.dirty = {
.mesa = 0,
- .brw = BRW_NEW_CONTEXT,
+ .brw = BRW_NEW_BATCH,
.cache = 0
},
.update = upload_pipe_control