i965/drm: Remove some unused functions and macros.

Mesa doesn't use these functions or macros, so we can delete them,
and save work refactoring and cleaning them up.  We'll delete a lot
more later, too.

Based on a patch by Kristian Høgsberg.

Reviewed-by: Chris Wilson <[email protected]>
Acked-by: Jason Ekstrand <[email protected]>

5 files changed, 0 insertions, 266 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.h b/src/mesa/drivers/dri/i965/brw_bufmgr.h
index cf5e8598a6d..afac9aebdfa 100644
--- a/src/mesa/drivers/dri/i965/brw_bufmgr.h
+++ b/src/mesa/drivers/dri/i965/brw_bufmgr.h
@@ -142,8 +142,6 @@ int drm_bacon_bo_emit_reloc_fence(drm_bacon_bo *bo, uint32_t offset,
 				  drm_bacon_bo *target_bo,
 				  uint32_t target_offset,
 				  uint32_t read_domains, uint32_t write_domain);
-int drm_bacon_bo_pin(drm_bacon_bo *bo, uint32_t alignment);
-int drm_bacon_bo_unpin(drm_bacon_bo *bo);
 int drm_bacon_bo_set_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
 			    uint32_t stride);
 int drm_bacon_bo_get_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
@@ -151,7 +149,6 @@ int drm_bacon_bo_get_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
 int drm_bacon_bo_flink(drm_bacon_bo *bo, uint32_t * name);
 int drm_bacon_bo_busy(drm_bacon_bo *bo);
 int drm_bacon_bo_madvise(drm_bacon_bo *bo, int madv);
-int drm_bacon_bo_use_48b_address_range(drm_bacon_bo *bo, uint32_t enable);
 int drm_bacon_bo_set_softpin_offset(drm_bacon_bo *bo, uint64_t offset);
 
 int drm_bacon_bo_disable_reuse(drm_bacon_bo *bo);
@@ -169,7 +166,6 @@ void drm_bacon_bufmgr_gem_set_vma_cache_size(drm_bacon_bufmgr *bufmgr,
 					     int limit);
 int drm_bacon_gem_bo_map_unsynchronized(drm_bacon_bo *bo);
 int drm_bacon_gem_bo_map_gtt(drm_bacon_bo *bo);
-int drm_bacon_gem_bo_unmap_gtt(drm_bacon_bo *bo);
 
 #define HAVE_DRM_INTEL_GEM_BO_DISABLE_IMPLICIT_SYNC 1
 int drm_bacon_bufmgr_gem_can_disable_implicit_sync(drm_bacon_bufmgr *bufmgr);
@@ -184,8 +180,6 @@ int drm_bacon_gem_bo_get_reloc_count(drm_bacon_bo *bo);
 void drm_bacon_gem_bo_clear_relocs(drm_bacon_bo *bo, int start);
 void drm_bacon_gem_bo_start_gtt_access(drm_bacon_bo *bo, int write_enable);
 
-int drm_bacon_get_pipe_from_crtc_id(drm_bacon_bufmgr *bufmgr, int crtc_id);
-
 int drm_bacon_bufmgr_gem_get_devid(drm_bacon_bufmgr *bufmgr);
 int drm_bacon_gem_bo_wait(drm_bacon_bo *bo, int64_t timeout_ns);
 
@@ -215,12 +209,6 @@ int drm_bacon_get_reset_stats(drm_bacon_context *ctx,
 			      uint32_t *active,
 			      uint32_t *pending);
 
-int drm_bacon_get_subslice_total(int fd, unsigned int *subslice_total);
-int drm_bacon_get_eu_total(int fd, unsigned int *eu_total);
-
-int drm_bacon_get_pooled_eu(int fd);
-int drm_bacon_get_min_eu_in_pool(int fd);
-
 /** @{ */
 
 #if defined(__cplusplus)
diff --git a/src/mesa/drivers/dri/i965/intel_bufmgr.c b/src/mesa/drivers/dri/i965/intel_bufmgr.c
index 1adf854dc70..a8e8ae7da65 100644
--- a/src/mesa/drivers/dri/i965/intel_bufmgr.c
+++ b/src/mesa/drivers/dri/i965/intel_bufmgr.c
@@ -206,36 +206,6 @@ drm_bacon_bo_emit_reloc(drm_bacon_bo *bo, uint32_t offset,
 					 read_domains, write_domain);
 }
 
-/* For fence registers, not GL fences */
-int
-drm_bacon_bo_emit_reloc_fence(drm_bacon_bo *bo, uint32_t offset,
-			      drm_bacon_bo *target_bo, uint32_t target_offset,
-			      uint32_t read_domains, uint32_t write_domain)
-{
-	return bo->bufmgr->bo_emit_reloc_fence(bo, offset,
-					       target_bo, target_offset,
-					       read_domains, write_domain);
-}
-
-
-int
-drm_bacon_bo_pin(drm_bacon_bo *bo, uint32_t alignment)
-{
-	if (bo->bufmgr->bo_pin)
-		return bo->bufmgr->bo_pin(bo, alignment);
-
-	return -ENODEV;
-}
-
-int
-drm_bacon_bo_unpin(drm_bacon_bo *bo)
-{
-	if (bo->bufmgr->bo_unpin)
-		return bo->bufmgr->bo_unpin(bo);
-
-	return -ENODEV;
-}
-
 int
 drm_bacon_bo_set_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
 			uint32_t stride)
@@ -301,26 +271,7 @@ drm_bacon_bo_madvise(drm_bacon_bo *bo, int madv)
 }
 
 int
-drm_bacon_bo_use_48b_address_range(drm_bacon_bo *bo, uint32_t enable)
-{
-	if (bo->bufmgr->bo_use_48b_address_range) {
-		bo->bufmgr->bo_use_48b_address_range(bo, enable);
-		return 0;
-	}
-
-	return -ENODEV;
-}
-
-int
 drm_bacon_bo_references(drm_bacon_bo *bo, drm_bacon_bo *target_bo)
 {
 	return bo->bufmgr->bo_references(bo, target_bo);
 }
-
-int
-drm_bacon_get_pipe_from_crtc_id(drm_bacon_bufmgr *bufmgr, int crtc_id)
-{
-	if (bufmgr->get_pipe_from_crtc_id)
-		return bufmgr->get_pipe_from_crtc_id(bufmgr, crtc_id);
-	return -1;
-}
diff --git a/src/mesa/drivers/dri/i965/intel_bufmgr_gem.c b/src/mesa/drivers/dri/i965/intel_bufmgr_gem.c
index e116788e326..b403bd70f09 100644
--- a/src/mesa/drivers/dri/i965/intel_bufmgr_gem.c
+++ b/src/mesa/drivers/dri/i965/intel_bufmgr_gem.c
@@ -579,9 +579,6 @@ drm_bacon_add_validate_buffer2(drm_bacon_bo *bo, int need_fence)
 	bufmgr_gem->exec_count++;
 }
 
-#define RELOC_BUF_SIZE(x) ((I915_RELOC_HEADER + x * I915_RELOC0_STRIDE) * \
-	sizeof(uint32_t))
-
 static void
 drm_bacon_bo_gem_set_in_aperture_size(drm_bacon_bufmgr_gem *bufmgr_gem,
 				      drm_bacon_bo_gem *bo_gem,
@@ -1725,12 +1722,6 @@ static int drm_bacon_gem_bo_unmap(drm_bacon_bo *bo)
 	return ret;
 }
 
-int
-drm_bacon_gem_bo_unmap_gtt(drm_bacon_bo *bo)
-{
-	return drm_bacon_gem_bo_unmap(bo);
-}
-
 static int
 drm_bacon_gem_bo_subdata(drm_bacon_bo *bo, unsigned long offset,
 			 unsigned long size, const void *data)
@@ -1762,31 +1753,6 @@ drm_bacon_gem_bo_subdata(drm_bacon_bo *bo, unsigned long offset,
 }
 
 static int
-drm_bacon_gem_get_pipe_from_crtc_id(drm_bacon_bufmgr *bufmgr, int crtc_id)
-{
-	drm_bacon_bufmgr_gem *bufmgr_gem = (drm_bacon_bufmgr_gem *) bufmgr;
-	struct drm_i915_get_pipe_from_crtc_id get_pipe_from_crtc_id;
-	int ret;
-
-	memclear(get_pipe_from_crtc_id);
-	get_pipe_from_crtc_id.crtc_id = crtc_id;
-	ret = drmIoctl(bufmgr_gem->fd,
-		       DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID,
-		       &get_pipe_from_crtc_id);
-	if (ret != 0) {
-		/* We return -1 here to signal that we don't
-		 * know which pipe is associated with this crtc.
-		 * This lets the caller know that this information
-		 * isn't available; using the wrong pipe for
-		 * vblank waiting can cause the chipset to lock up
-		 */
-		return -1;
-	}
-
-	return get_pipe_from_crtc_id.pipe;
-}
-
-static int
 drm_bacon_gem_bo_get_subdata(drm_bacon_bo *bo, unsigned long offset,
 			     unsigned long size, void *data)
 {
@@ -2038,17 +2004,6 @@ do_bo_emit_reloc(drm_bacon_bo *bo, uint32_t offset,
 	return 0;
 }
 
-static void
-drm_bacon_gem_bo_use_48b_address_range(drm_bacon_bo *bo, uint32_t enable)
-{
-	drm_bacon_bo_gem *bo_gem = (drm_bacon_bo_gem *) bo;
-
-	if (enable)
-		bo_gem->kflags |= EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
-	else
-		bo_gem->kflags &= ~EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
-}
-
 static int
 drm_bacon_gem_bo_add_softpin_target(drm_bacon_bo *bo, drm_bacon_bo *target_bo)
 {
@@ -2103,16 +2058,6 @@ drm_bacon_gem_bo_emit_reloc(drm_bacon_bo *bo, uint32_t offset,
 					!bufmgr_gem->fenced_relocs);
 }
 
-static int
-drm_bacon_gem_bo_emit_reloc_fence(drm_bacon_bo *bo, uint32_t offset,
-				  drm_bacon_bo *target_bo,
-				  uint32_t target_offset,
-				  uint32_t read_domains, uint32_t write_domain)
-{
-	return do_bo_emit_reloc(bo, offset, target_bo, target_offset,
-				read_domains, write_domain, true);
-}
-
 int
 drm_bacon_gem_bo_get_reloc_count(drm_bacon_bo *bo)
 {
@@ -2505,47 +2450,6 @@ drm_bacon_gem_bo_fence_exec(drm_bacon_bo *bo,
 }
 
 static int
-drm_bacon_gem_bo_pin(drm_bacon_bo *bo, uint32_t alignment)
-{
-	drm_bacon_bufmgr_gem *bufmgr_gem = (drm_bacon_bufmgr_gem *) bo->bufmgr;
-	drm_bacon_bo_gem *bo_gem = (drm_bacon_bo_gem *) bo;
-	struct drm_i915_gem_pin pin;
-	int ret;
-
-	memclear(pin);
-	pin.handle = bo_gem->gem_handle;
-	pin.alignment = alignment;
-
-	ret = drmIoctl(bufmgr_gem->fd,
-		       DRM_IOCTL_I915_GEM_PIN,
-		       &pin);
-	if (ret != 0)
-		return -errno;
-
-	bo->offset64 = pin.offset;
-	bo->offset = pin.offset;
-	return 0;
-}
-
-static int
-drm_bacon_gem_bo_unpin(drm_bacon_bo *bo)
-{
-	drm_bacon_bufmgr_gem *bufmgr_gem = (drm_bacon_bufmgr_gem *) bo->bufmgr;
-	drm_bacon_bo_gem *bo_gem = (drm_bacon_bo_gem *) bo;
-	struct drm_i915_gem_unpin unpin;
-	int ret;
-
-	memclear(unpin);
-	unpin.handle = bo_gem->gem_handle;
-
-	ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_UNPIN, &unpin);
-	if (ret != 0)
-		return -errno;
-
-	return 0;
-}
-
-static int
 drm_bacon_gem_bo_set_tiling_internal(drm_bacon_bo *bo,
 				     uint32_t tiling_mode,
 				     uint32_t stride)
@@ -3306,68 +3210,6 @@ drm_bacon_reg_read(drm_bacon_bufmgr *bufmgr,
 	return ret;
 }
 
-int
-drm_bacon_get_subslice_total(int fd, unsigned int *subslice_total)
-{
-	drm_i915_getparam_t gp;
-	int ret;
-
-	memclear(gp);
-	gp.value = (int*)subslice_total;
-	gp.param = I915_PARAM_SUBSLICE_TOTAL;
-	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-	if (ret)
-		return -errno;
-
-	return 0;
-}
-
-int
-drm_bacon_get_eu_total(int fd, unsigned int *eu_total)
-{
-	drm_i915_getparam_t gp;
-	int ret;
-
-	memclear(gp);
-	gp.value = (int*)eu_total;
-	gp.param = I915_PARAM_EU_TOTAL;
-	ret = drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-	if (ret)
-		return -errno;
-
-	return 0;
-}
-
-int
-drm_bacon_get_pooled_eu(int fd)
-{
-	drm_i915_getparam_t gp;
-	int ret = -1;
-
-	memclear(gp);
-	gp.param = I915_PARAM_HAS_POOLED_EU;
-	gp.value = &ret;
-	if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
-		return -errno;
-
-	return ret;
-}
-
-int
-drm_bacon_get_min_eu_in_pool(int fd)
-{
-	drm_i915_getparam_t gp;
-	int ret = -1;
-
-	memclear(gp);
-	gp.param = I915_PARAM_MIN_EU_IN_POOL;
-	gp.value = &ret;
-	if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
-		return -errno;
-
-	return ret;
-}
-
 static pthread_mutex_t bufmgr_list_mutex = PTHREAD_MUTEX_INITIALIZER;
 static struct list_head bufmgr_list = { &bufmgr_list, &bufmgr_list };
 
@@ -3697,13 +3539,6 @@ drm_bacon_bufmgr_gem_init(int fd, int batch_size)
 		}
 	}
 
-	if (bufmgr_gem->gen >= 8) {
-		gp.param = I915_PARAM_HAS_ALIASING_PPGTT;
-		ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GETPARAM, &gp);
-		if (ret == 0 && *gp.value == 3)
-			bufmgr_gem->bufmgr.bo_use_48b_address_range = drm_bacon_gem_bo_use_48b_address_range;
-	}
-
 	/* Let's go with one relocation per every 2 dwords (but round down a bit
 	 * since a power of two will mean an extra page allocation for the reloc
 	 * buffer).
@@ -3724,9 +3559,6 @@ drm_bacon_bufmgr_gem_init(int fd, int batch_size)
 	bufmgr_gem->bufmgr.bo_get_subdata = drm_bacon_gem_bo_get_subdata;
 	bufmgr_gem->bufmgr.bo_wait_rendering = drm_bacon_gem_bo_wait_rendering;
 	bufmgr_gem->bufmgr.bo_emit_reloc = drm_bacon_gem_bo_emit_reloc;
-	bufmgr_gem->bufmgr.bo_emit_reloc_fence = drm_bacon_gem_bo_emit_reloc_fence;
-	bufmgr_gem->bufmgr.bo_pin = drm_bacon_gem_bo_pin;
-	bufmgr_gem->bufmgr.bo_unpin = drm_bacon_gem_bo_unpin;
 	bufmgr_gem->bufmgr.bo_get_tiling = drm_bacon_gem_bo_get_tiling;
 	bufmgr_gem->bufmgr.bo_set_tiling = drm_bacon_gem_bo_set_tiling;
 	bufmgr_gem->bufmgr.bo_flink = drm_bacon_gem_bo_flink;
@@ -3744,8 +3576,6 @@ drm_bacon_bufmgr_gem_init(int fd, int batch_size)
 	    drm_bacon_gem_check_aperture_space;
 	bufmgr_gem->bufmgr.bo_disable_reuse = drm_bacon_gem_bo_disable_reuse;
 	bufmgr_gem->bufmgr.bo_is_reusable = drm_bacon_gem_bo_is_reusable;
-	bufmgr_gem->bufmgr.get_pipe_from_crtc_id =
-	    drm_bacon_gem_get_pipe_from_crtc_id;
 	bufmgr_gem->bufmgr.bo_references = drm_bacon_gem_bo_references;
 
 	init_cache_buckets(bufmgr_gem);
diff --git a/src/mesa/drivers/dri/i965/intel_bufmgr_priv.h b/src/mesa/drivers/dri/i965/intel_bufmgr_priv.h
index 91b68c969b2..7fcde181455 100644
--- a/src/mesa/drivers/dri/i965/intel_bufmgr_priv.h
+++ b/src/mesa/drivers/dri/i965/intel_bufmgr_priv.h
@@ -207,21 +207,6 @@ struct _drm_bacon_bufmgr {
 			    int DR4, unsigned flags);
 
 	/**
-	 * Pin a buffer to the aperture and fix the offset until unpinned
-	 *
-	 * \param buf Buffer to pin
-	 * \param alignment Required alignment for aperture, in bytes
-	 */
-	int (*bo_pin) (drm_bacon_bo *bo, uint32_t alignment);
-
-	/**
-	 * Unpin a buffer from the aperture, allowing it to be removed
-	 *
-	 * \param buf Buffer to unpin
-	 */
-	int (*bo_unpin) (drm_bacon_bo *bo);
-
-	/**
 	 * Ask that the buffer be placed in tiling mode
 	 *
 	 * \param buf Buffer to set tiling mode for
@@ -293,19 +278,6 @@ struct _drm_bacon_bufmgr {
 	 */
 	int (*bo_is_reusable) (drm_bacon_bo *bo);
 
-	/**
-	 *
-	 * Return the pipe associated with a crtc_id so that vblank
-	 * synchronization can use the correct data in the request.
-	 * This is only supported for KMS and gem at this point, when
-	 * unsupported, this function returns -1 and leaves the decision
-	 * of what to do in that case to the caller
-	 *
-	 * \param bufmgr the associated buffer manager
-	 * \param crtc_id the crtc identifier
-	 */
-	int (*get_pipe_from_crtc_id) (drm_bacon_bufmgr *bufmgr, int crtc_id);
-
 	/** Returns true if target_bo is in the relocation tree rooted at bo. */
 	int (*bo_references) (drm_bacon_bo *bo, drm_bacon_bo *target_bo);
 
diff --git a/src/mesa/drivers/dri/i965/libdrm_macros.h b/src/mesa/drivers/dri/i965/libdrm_macros.h
index 639d09047ef..7427fb18989 100644
--- a/src/mesa/drivers/dri/i965/libdrm_macros.h
+++ b/src/mesa/drivers/dri/i965/libdrm_macros.h
@@ -23,13 +23,6 @@
 #ifndef LIBDRM_LIBDRM_H
 #define LIBDRM_LIBDRM_H
 
-#if defined(HAVE_VISIBILITY)
-#  define drm_private __attribute__((visibility("hidden")))
-#else
-#  define drm_private
-#endif
-
-
 /**
  * Static (compile-time) assertion.
  * Basically, use COND to dimension an array.  If COND is false/zero the