diff options
author | Kenneth Graunke <[email protected]> | 2014-01-18 14:34:07 -0800 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2014-01-22 17:18:49 -0800 |
commit | e0a560291184b7b5ff32afa60a202893ca5a3d77 (patch) | |
tree | dcbfb87d6d870d1a4cf31dc020b852b6b292053e | |
parent | 6943ac0bd9d0d07019cffbbcb5189aa8d67b729b (diff) |
i965/vec4: Don't set header_present if texel offsets are all 0.
In theory, a shader might use textureOffset() but set all the texel
offsets to zero. In that case, we don't actually need to set up the
message header - zero is the implicit default.
By moving the texture_offset setup before the header_present setup, we
can easily only set header_present when there are non-zero texel offset
values.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Reviewed-by: Chris Forbes <[email protected]>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 15a6cbdd256..daf46b6ab82 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -2363,10 +2363,16 @@ vec4_visitor::visit(ir_texture *ir) assert(!"Unrecognized tex op"); } - bool use_texture_offset = ir->offset != NULL && ir->op != ir_txf; + if (ir->offset != NULL && ir->op != ir_txf) + inst->texture_offset = brw_texture_offset(ctx, ir->offset->as_constant()); + + /* Stuff the channel select bits in the top of the texture offset */ + if (ir->op == ir_tg4) + inst->texture_offset |= gather_channel(ir, sampler) << 16; /* Texel offsets go in the message header; Gen4 also requires headers. */ - inst->header_present = use_texture_offset || brw->gen < 5 || ir->op == ir_tg4; + inst->header_present = + brw->gen < 5 || inst->texture_offset != 0 || ir->op == ir_tg4; inst->base_mrf = 2; inst->mlen = inst->header_present + 1; /* always at least one */ inst->sampler = sampler; @@ -2374,13 +2380,6 @@ vec4_visitor::visit(ir_texture *ir) inst->dst.writemask = WRITEMASK_XYZW; inst->shadow_compare = ir->shadow_comparitor != NULL; - if (use_texture_offset) - inst->texture_offset = brw_texture_offset(ctx, ir->offset->as_constant()); - - /* Stuff the channel select bits in the top of the texture offset */ - if (ir->op == ir_tg4) - inst->texture_offset |= gather_channel(ir, sampler)<<16; - /* MRF for the first parameter */ int param_base = inst->base_mrf + inst->header_present; |