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authorMatt Turner <[email protected]>2014-05-29 16:47:39 -0700
committerMatt Turner <[email protected]>2014-05-30 12:20:45 -0700
commit65bccff800dc1181ec2a6ee007a10ee0ec10b089 (patch)
treed858d68d1845cedb349687ab703b11cfa962798f
parentd292d40207359cc70c004182484aaa939fd29e59 (diff)
i965/vec4: Allow writemasking on math instructions on Gen7+.
The math instruction was Align1-only on Gen6 and we never updated this to let it use Align16 features like writemasking on newer platforms. total instructions in shared programs: 1686120 -> 1685507 (-0.04%) instructions in affected programs: 48593 -> 47980 (-1.26%) Reviewed-by: Kenneth Graunke <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 54a40dde1dd..ee52c076175 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -326,7 +326,7 @@ vec4_visitor::emit_math1_gen6(enum opcode opcode, dst_reg dst, src_reg src)
{
src = fix_math_operand(src);
- if (dst.writemask != WRITEMASK_XYZW) {
+ if (brw->gen == 6 && dst.writemask != WRITEMASK_XYZW) {
/* The gen6 math instruction must be align1, so we can't do
* writemasks.
*/
@@ -379,7 +379,7 @@ vec4_visitor::emit_math2_gen6(enum opcode opcode,
src0 = fix_math_operand(src0);
src1 = fix_math_operand(src1);
- if (dst.writemask != WRITEMASK_XYZW) {
+ if (brw->gen == 6 && dst.writemask != WRITEMASK_XYZW) {
/* The gen6 math instruction must be align1, so we can't do
* writemasks.
*/