r600g,radeonsi: share r600_surface

I'm gonna use this in radeonsi.

Reviewed-by: Michel Dänzer <[email protected]>

5 files changed, 50 insertions, 54 deletions

diff --git a/src/gallium/drivers/r600/r600_resource.h b/src/gallium/drivers/r600/r600_resource.h
index db88c9a5f00..ae0bd8838b9 100644
--- a/src/gallium/drivers/r600/r600_resource.h
+++ b/src/gallium/drivers/r600/r600_resource.h
@@ -34,50 +34,6 @@ struct r600_resource_global {
 	struct compute_memory_item *chunk;
 };
 
-struct r600_surface {
-	struct pipe_surface		base;
-
-	bool color_initialized;
-	bool depth_initialized;
-
-	/* Misc. color flags. */
-	bool alphatest_bypass;
-	bool export_16bpc;
-
-	/* Color registers. */
-	unsigned cb_color_info;
-	unsigned cb_color_base;
-	unsigned cb_color_view;
-	unsigned cb_color_size;		/* R600 only */
-	unsigned cb_color_dim;		/* EG only */
-	unsigned cb_color_pitch;	/* EG only */
-	unsigned cb_color_slice;	/* EG only */
-	unsigned cb_color_attrib;	/* EG only */
-	unsigned cb_color_fmask;	/* CB_COLORn_FMASK (EG) or CB_COLORn_FRAG (r600) */
-	unsigned cb_color_fmask_slice;	/* EG only */
-	unsigned cb_color_cmask;	/* CB_COLORn_CMASK (EG) or CB_COLORn_TILE (r600) */
-	unsigned cb_color_cmask_slice;	/* EG only */
-	unsigned cb_color_mask;		/* R600 only */
-	struct r600_resource *cb_buffer_fmask; /* Used for FMASK relocations. R600 only */
-	struct r600_resource *cb_buffer_cmask; /* Used for CMASK relocations. R600 only */
-
-	/* DB registers. */
-	unsigned db_depth_info;		/* DB_Z_INFO (EG) or DB_DEPTH_INFO (r600) */
-	unsigned db_depth_base;		/* DB_Z_READ/WRITE_BASE (EG) or DB_DEPTH_BASE (r600) */
-	unsigned db_depth_view;
-	unsigned db_depth_size;
-	unsigned db_depth_slice;	/* EG only */
-	unsigned db_stencil_base;	/* EG only */
-	unsigned db_stencil_info;	/* EG only */
-	unsigned db_prefetch_limit;	/* R600 only */
-	unsigned pa_su_poly_offset_db_fmt_cntl;
-
-	unsigned			htile_enabled;
-	unsigned			db_htile_surface;
-	unsigned			db_htile_data_base;
-	unsigned			db_preload_control;
-};
-
 /* Return if the depth format can be read without the DB->CB copy on r6xx-r7xx. */
 static INLINE bool r600_can_read_depth(struct r600_texture *rtex)
 {
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index d604f65226d..6af8a7a480d 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -160,6 +160,51 @@ struct r600_texture {
 	unsigned			mipmap_shift;
 };
 
+struct r600_surface {
+	struct pipe_surface		base;
+
+	bool color_initialized;
+	bool depth_initialized;
+
+	/* Misc. color flags. */
+	bool alphatest_bypass;
+	bool export_16bpc;
+
+	/* Color registers. */
+	unsigned cb_color_info;
+	unsigned cb_color_base;
+	unsigned cb_color_view;
+	unsigned cb_color_size;		/* R600 only */
+	unsigned cb_color_dim;		/* EG only */
+	unsigned cb_color_pitch;	/* EG and later */
+	unsigned cb_color_slice;	/* EG and later */
+	unsigned cb_color_attrib;	/* EG and later */
+	unsigned cb_color_fmask;	/* CB_COLORn_FMASK (EG and later) or CB_COLORn_FRAG (r600) */
+	unsigned cb_color_fmask_slice;	/* EG and later */
+	unsigned cb_color_cmask;	/* CB_COLORn_CMASK (EG and later) or CB_COLORn_TILE (r600) */
+	unsigned cb_color_cmask_slice;	/* EG and later */
+	unsigned cb_color_mask;		/* R600 only */
+	struct r600_resource *cb_buffer_fmask; /* Used for FMASK relocations. R600 only */
+	struct r600_resource *cb_buffer_cmask; /* Used for CMASK relocations. R600 only */
+
+	/* DB registers. */
+	unsigned db_depth_info;		/* R600 only, then SI and later */
+	unsigned db_z_info;		/* EG and later */
+	unsigned db_depth_base;		/* DB_Z_READ/WRITE_BASE (EG and later) or DB_DEPTH_BASE (r600) */
+	unsigned db_depth_view;
+	unsigned db_depth_size;
+	unsigned db_depth_slice;	/* EG and later */
+	unsigned db_stencil_base;	/* EG and later */
+	unsigned db_stencil_info;	/* EG and later */
+	unsigned db_prefetch_limit;	/* R600 only */
+	unsigned db_htile_surface;
+	unsigned db_htile_data_base;
+	unsigned db_preload_control;	/* EG and later */
+	unsigned pa_su_poly_offset_db_fmt_cntl;
+
+	unsigned htile_enabled;		/* XXX remove */
+};
+
 struct r600_tiling_info {
 	unsigned num_channels;
 	unsigned num_banks;
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index f97feb0464c..4709454c9dd 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -70,10 +70,6 @@ struct si_textures_info {
 	unsigned			n_samplers;
 };
 
-struct si_surface {
-	struct pipe_surface		base;
-};
-
 #define SI_NUM_ATOMS(sctx) (sizeof((sctx)->atoms)/sizeof((sctx)->atoms.array[0]))
 
 #define SI_NUM_SHADERS (PIPE_SHADER_GEOMETRY+1)
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index f2886521e3a..0154e5804b8 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1576,7 +1576,7 @@ static void si_cb(struct si_context *sctx, struct si_pm4_state *pm4,
 		  const struct pipe_framebuffer_state *state, int cb)
 {
 	struct r600_texture *rtex;
-	struct si_surface *surf;
+	struct r600_surface *surf;
 	unsigned level = state->cbufs[cb]->u.tex.level;
 	unsigned pitch, slice;
 	unsigned color_info, color_attrib, color_pitch, color_view;
@@ -1588,7 +1588,7 @@ static void si_cb(struct si_context *sctx, struct si_pm4_state *pm4,
 	unsigned blend_clamp = 0, blend_bypass = 0;
 	unsigned max_comp_size;
 
-	surf = (struct si_surface *)state->cbufs[cb];
+	surf = (struct r600_surface *)state->cbufs[cb];
 	rtex = (struct r600_texture*)state->cbufs[cb]->texture;
 
 	offset = rtex->surface.level[level].offset;
@@ -1755,7 +1755,7 @@ static void si_db(struct si_context *sctx, struct si_pm4_state *pm4,
 {
 	struct si_screen *sscreen = sctx->screen;
 	struct r600_texture *rtex;
-	struct si_surface *surf;
+	struct r600_surface *surf;
 	unsigned level, pitch, slice, format, tile_mode_index, array_mode;
 	unsigned macro_aspect, tile_split, stile_split, bankh, bankw, nbanks, pipe_config;
 	uint32_t z_info, s_info, db_depth_info;
@@ -1768,7 +1768,7 @@ static void si_db(struct si_context *sctx, struct si_pm4_state *pm4,
 		return;
 	}
 
-	surf = (struct si_surface *)state->zsbuf;
+	surf = (struct r600_surface *)state->zsbuf;
 	level = surf->base.u.tex.level;
 	rtex = (struct r600_texture*)surf->base.texture;
 
@@ -3084,7 +3084,7 @@ static struct pipe_surface *r600_create_surface(struct pipe_context *pipe,
 						const struct pipe_surface *surf_tmpl)
 {
 	struct r600_texture *rtex = (struct r600_texture*)texture;
-	struct si_surface *surface = CALLOC_STRUCT(si_surface);
+	struct r600_surface *surface = CALLOC_STRUCT(r600_surface);
 	unsigned level = surf_tmpl->u.tex.level;
 
 	if (surface == NULL)
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 6922c88e07c..fbc0d231226 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -217,7 +217,6 @@ void si_upload_const_buffer(struct si_context *sctx, struct r600_resource **rbuf
 
 /* si_state.c */
 struct si_pipe_shader_selector;
-struct si_surface;
 
 boolean si_is_format_supported(struct pipe_screen *screen,
                                enum pipe_format format,