r300g,uvd,vce: set priorities for relocations

This updates all occurences of cs_add_reloc.

6 files changed, 31 insertions, 16 deletions

diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c
index b038a9719ae..d99b91919c4 100644
--- a/src/gallium/drivers/r300/r300_emit.c
+++ b/src/gallium/drivers/r300/r300_emit.c
@@ -1314,7 +1314,10 @@ validate:
             assert(tex && tex->buf && "cbuf is marked, but NULL!");
             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf,
                                     RADEON_USAGE_READWRITE,
-                                    r300_surface(fb->cbufs[i])->domain);
+                                    r300_surface(fb->cbufs[i])->domain,
+                                    tex->b.b.nr_samples > 1 ?
+                                    RADEON_PRIO_COLOR_BUFFER_MSAA :
+                                    RADEON_PRIO_COLOR_BUFFER);
         }
         /* ...depth buffer... */
         if (fb->zsbuf) {
@@ -1322,7 +1325,10 @@ validate:
             assert(tex && tex->buf && "zsbuf is marked, but NULL!");
             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf,
                                     RADEON_USAGE_READWRITE,
-                                    r300_surface(fb->zsbuf)->domain);
+                                    r300_surface(fb->zsbuf)->domain,
+                                    tex->b.b.nr_samples > 1 ?
+                                    RADEON_PRIO_DEPTH_BUFFER_MSAA :
+                                    RADEON_PRIO_DEPTH_BUFFER);
         }
     }
     /* The AA resolve buffer. */
@@ -1330,7 +1336,8 @@ validate:
         if (aa->dest) {
             r300->rws->cs_add_reloc(r300->cs, aa->dest->cs_buf,
                                     RADEON_USAGE_WRITE,
-                                    aa->dest->domain);
+                                    aa->dest->domain,
+                                    RADEON_PRIO_COLOR_BUFFER);
         }
     }
     if (r300->textures_state.dirty) {
@@ -1342,17 +1349,19 @@ validate:
 
             tex = r300_resource(texstate->sampler_views[i]->base.texture);
             r300->rws->cs_add_reloc(r300->cs, tex->cs_buf, RADEON_USAGE_READ,
-                                    tex->domain);
+                                    tex->domain, RADEON_PRIO_SHADER_TEXTURE_RO);
         }
     }
     /* ...occlusion query buffer... */
     if (r300->query_current)
         r300->rws->cs_add_reloc(r300->cs, r300->query_current->cs_buf,
-                                RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT);
+                                RADEON_USAGE_WRITE, RADEON_DOMAIN_GTT,
+                                RADEON_PRIO_MIN);
     /* ...vertex buffer for SWTCL path... */
     if (r300->vbo_cs)
         r300->rws->cs_add_reloc(r300->cs, r300->vbo_cs,
-                                RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
+                                RADEON_USAGE_READ, RADEON_DOMAIN_GTT,
+                                RADEON_PRIO_MIN);
     /* ...vertex buffers for HWTCL path... */
     if (do_validate_vertex_buffers && r300->vertex_arrays_dirty) {
         struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
@@ -1367,14 +1376,16 @@ validate:
 
             r300->rws->cs_add_reloc(r300->cs, r300_resource(buf)->cs_buf,
                                     RADEON_USAGE_READ,
-                                    r300_resource(buf)->domain);
+                                    r300_resource(buf)->domain,
+                                    RADEON_PRIO_SHADER_BUFFER_RO);
         }
     }
     /* ...and index buffer for HWTCL path. */
     if (index_buffer)
         r300->rws->cs_add_reloc(r300->cs, r300_resource(index_buffer)->cs_buf,
                                 RADEON_USAGE_READ,
-                                r300_resource(index_buffer)->domain);
+                                r300_resource(index_buffer)->domain,
+                                RADEON_PRIO_MIN);
 
     /* Now do the validation (flush is called inside cs_validate on failure). */
     if (!r300->rws->cs_validate(r300->cs)) {
diff --git a/src/gallium/drivers/radeon/r600_cs.h b/src/gallium/drivers/radeon/r600_cs.h
index c3af3decfcc..45dc76c433b 100644
--- a/src/gallium/drivers/radeon/r600_cs.h
+++ b/src/gallium/drivers/radeon/r600_cs.h
@@ -63,7 +63,8 @@ static INLINE unsigned r600_context_bo_reloc(struct r600_common_context *rctx,
 			rctx->rings.gfx.flush(rctx, RADEON_FLUSH_ASYNC);
 		}
 	}
-	return rctx->ws->cs_add_reloc(ring->cs, rbo->cs_buf, usage, rbo->domains) * 4;
+	return rctx->ws->cs_add_reloc(ring->cs, rbo->cs_buf, usage,
+				      rbo->domains, RADEON_PRIO_MIN) * 4;
 }
 
 static INLINE void r600_emit_reloc(struct r600_common_context *rctx,
diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index 8ca8dc30b9f..6c54cee4a40 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -105,7 +105,8 @@ static void send_cmd(struct ruvd_decoder *dec, unsigned cmd,
 {
 	int reloc_idx;
 
-	reloc_idx = dec->ws->cs_add_reloc(dec->cs, cs_buf, usage, domain);
+	reloc_idx = dec->ws->cs_add_reloc(dec->cs, cs_buf, usage, domain,
+					  RADEON_PRIO_MIN);
 	set_reg(dec, RUVD_GPCOM_VCPU_DATA0, off);
 	set_reg(dec, RUVD_GPCOM_VCPU_DATA1, reloc_idx * 4);
 	set_reg(dec, RUVD_GPCOM_VCPU_CMD, cmd << 1);
diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h
index 89238ff5992..80495e5e8d7 100644
--- a/src/gallium/drivers/radeon/radeon_vce.h
+++ b/src/gallium/drivers/radeon/radeon_vce.h
@@ -34,7 +34,7 @@
 #ifndef RADEON_VCE_H
 #define RADEON_VCE_H
 
-#define RVCE_RELOC(buf, usage, domain) (enc->ws->cs_add_reloc(enc->cs, (buf), (usage), domain))
+#define RVCE_RELOC(buf, usage, domain) (enc->ws->cs_add_reloc(enc->cs, (buf), (usage), domain, RADEON_PRIO_MIN))
 
 #define RVCE_CS(value) (enc->cs->buf[enc->cs->cdw++] = (value))
 #define RVCE_BEGIN(cmd) { uint32_t *begin = &enc->cs->buf[enc->cs->cdw++]; RVCE_CS(cmd)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 98b7a29427b..d5bdd516ca0 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -349,12 +349,13 @@ static unsigned radeon_add_reloc(struct radeon_drm_cs *cs,
 static unsigned radeon_drm_cs_add_reloc(struct radeon_winsys_cs *rcs,
                                         struct radeon_winsys_cs_handle *buf,
                                         enum radeon_bo_usage usage,
-                                        enum radeon_bo_domain domains)
+                                        enum radeon_bo_domain domains,
+                                        enum radeon_bo_priority priority)
 {
     struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
     struct radeon_bo *bo = (struct radeon_bo*)buf;
     enum radeon_bo_domain added_domains;
-    unsigned index = radeon_add_reloc(cs, bo, usage, domains, 0, &added_domains);
+    unsigned index = radeon_add_reloc(cs, bo, usage, domains, priority, &added_domains);
 
     if (added_domains & RADEON_DOMAIN_GTT)
         cs->csc->used_gart += bo->base.size;
@@ -654,7 +655,8 @@ radeon_cs_create_fence(struct radeon_winsys_cs *rcs)
                                        RADEON_DOMAIN_GTT);
     /* Add the fence as a dummy relocation. */
     cs->ws->base.cs_add_reloc(rcs, cs->ws->base.buffer_get_cs_handle(fence),
-                              RADEON_USAGE_READWRITE, RADEON_DOMAIN_GTT);
+                              RADEON_USAGE_READWRITE, RADEON_DOMAIN_GTT,
+                              RADEON_PRIO_MIN);
     return (struct pipe_fence_handle*)fence;
 }
 
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index 5b2b31aea48..a5461a80048 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -434,8 +434,8 @@ struct radeon_winsys {
     unsigned (*cs_add_reloc)(struct radeon_winsys_cs *cs,
                              struct radeon_winsys_cs_handle *buf,
                              enum radeon_bo_usage usage,
-                             enum radeon_bo_domain domain/*,
-                             enum radeon_bo_priority priority*/);
+                             enum radeon_bo_domain domain,
+                             enum radeon_bo_priority priority);
 
     /**
      * Return TRUE if there is enough memory in VRAM and GTT for the relocs