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authorMatt Turner <[email protected]>2020-06-19 12:32:44 -0700
committerMarge Bot <[email protected]>2020-07-02 01:24:06 +0000
commitfe14dc98bfe7ac9bf7a5d2adf7d2619147863ba4 (patch)
treea56261fa39dfee5f9ed32692cc145ac3d602e054 /.gitlab
parent29e2a3b8f5e75508202cd651d16648256f303779 (diff)
intel/compiler: Add assert that set bits are within mask
We generate bitfields of bits that we want to retain (mask) and bits that we want to set (brw_mode) in the cr0 register, so the bits we want to set should be in the set of bits we want to retain. Also, remove the initialization of mask from fs_visitor::emit_shader_float_controls_execution_mode since brw_rnd_mode_from_nir initializes the mask parameter unconditionally. Reviewed-by: Lionel Landwerlin <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5566>
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