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authorSamuel Pitoiset <[email protected]>2018-09-10 18:14:41 +0200
committerSamuel Pitoiset <[email protected]>2018-09-11 11:30:19 +0200
commit3d08631fe5779cfadfeba3df89fbbddf3fde331b (patch)
tree31fccd2751c2f3925826a59ffc4b7e88fdc30fd4 /.gitattributes
parent47e01e77d8b658606527f048cda786440f7fbe85 (diff)
radv: adjust ESGS ring buffer size computation on VI+
Noticed while working in this area. Ported from RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
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