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authorFrancisco Jerez <[email protected]>2017-10-13 17:52:00 -0700
committerFrancisco Jerez <[email protected]>2017-12-07 18:27:05 -0800
commit4d1959e69328cf0d59f0ec7aeea5a2b704ef0c5f (patch)
tree6fd1d659669507fd3209fda1a1c7a927b60b5919 /.editorconfig
parent9355116bdad6ee9914554de8e48ba271bd36a8eb (diff)
intel/cfg: Represent divergent control flow paths caused by non-uniform loop execution.
This addresses a long-standing back-end compiler bug that could lead to cross-channel data corruption in loops executed non-uniformly. In some cases live variables extending through a loop divergence point (e.g. a non-uniform break) into a convergence point (e.g. the end of the loop) wouldn't be considered live along all physical control flow paths the SIMD thread could possibly have taken in between due to some channels remaining in the loop for additional iterations. This patch fixes the problem by extending the CFG with physical edges that don't exist in the idealized non-vectorized program, but represent valid control flow paths the SIMD EU may take due to the divergence of logical threads. This makes sense because the i965 IR is explicitly SIMD, and it's not uncommon for instructions to have an influence on neighboring channels (e.g. a force_writemask_all header setup), so the behavior of the SIMD thread as a whole needs to be considered. No changes in shader-db. Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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