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| author | Francisco Jerez <[email protected]> | 2020-01-04 16:11:23 -0800 |
|---|---|---|
| committer | Francisco Jerez <[email protected]> | 2020-02-14 14:31:49 -0800 |
| commit | 04c7d3d4b19610cae8250102fefd0012b7233d9e (patch) | |
| tree | 5d0d9b493b6a840f9b73114c43419cfee5bf44cb /.appveyor | |
| parent | 1c6853a9be28c4193fc44eebf812ecf7a02a04f9 (diff) | |
intel/fs: Return consistent UW types from sample_mask_reg() in fragment shaders.
In SIMD32 programs that don't use discard, the upper 16 bits of the UD
result of sample_mask_reg() don't contain the sample mask of the upper
16 channels as one would expect. Stop pretending we are returning a
valid 32-bit mask.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to '.appveyor')
0 files changed, 0 insertions, 0 deletions