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* Add some helpers for start_consJack Lloyd2021-01-139-23/+49
| | | | | Nothing in the library uses start_cons anymore but it is left exposed for applications which need to encode something unusual.
* Indentation fixesJack Lloyd2021-01-111-9/+9
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* Merge GH #2584 Split ASN1_Tag into ASN1_Type and ASN1_ClassJack Lloyd2021-01-1151-506/+526
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| * Split ASN1 tags enum class into 2 enum classessledgehammer_9992021-01-1151-506/+526
| | | | | | | | This should improve type safety even more.
* | Avoid using macros in x86 cpuid codeJack Lloyd2021-01-092-26/+41
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* Add compile-time AVX512VL versions of Ch and Maj for AVX2Jack Lloyd2021-01-091-0/+8
| | | | Tested with Intel SDE
* Merge GH #2579 Add majority and choose bitwise functionsJack Lloyd2021-01-0913-47/+75
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| * Add choose and majority functionsJack Lloyd2021-01-0913-47/+75
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* | Whitespace fixJack Lloyd2021-01-091-1/+0
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* Simplify this store code a bitJack Lloyd2021-01-091-20/+6
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* Clean up POWER CPUID logicJack Lloyd2021-01-041-86/+30
| | | | | | | PVR emulation only works (afaik) on Linux and NetBSD. On Linux we can already use getauxval. Instead use direct instruction probing which works on many different systems, and is more reliable vs checking the PVR against a known list, which goes out of date quickly.
* Merge GH #2573 Split up ARMv7 and Aarch64 cpuid logicJack Lloyd2021-01-046-259/+259
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| * Remove cache line display from cpuid utilJack Lloyd2021-01-041-4/+0
| | | | | | | | | | Since if we can't detect we show 32 which is confusing though it makes sense wrt its use in side channel countermeasures.
| * Refactor ARM CPUID codeJack Lloyd2021-01-037-259/+263
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split into arm32 and arm64 versions since they are mostly distinct code. Remove the code for sniffing NEON/AES support based on iOS version models. All 64-bit Apple ARM processors support NEON/AES/etc, so we can just assume it is there if we are building for aarch64. And Apple does not support 32-bit applications at all anymore (starting in iOS 11), so there is no point in new code supporting such systems. Add support for a couple of new Linux/POSIX methods of getting the cache line size using sysconf and different auxv fields. Move the cache line detection code to os_utils since with the sole exception of x86 we require OS specific support to get this information. This also has the effect of enabling it on more platforms (particularly for Linux).
* | Add some more CCM tests taken from NISTJack Lloyd2021-01-041-0/+68
|/ | | | | | Specifically ones using empty or small ADs, which were untested. GH #2574
* Merge GH #2567 Fix Python CBC encryptionJack Lloyd2021-01-032-2/+13
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| * Don't provide extra space when decryptingJack Lloyd2020-12-281-1/+2
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| * Fix a bug preventing use of CBC encryption via PythonJack Lloyd2020-12-282-2/+12
| | | | | | | | GH #2566
* | Little tweaks and pre assuming few basic cpu features for the M1David CARLIER2021-01-021-9/+22
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* | Mac M1 build update, cpu features detection.David CARLIER2020-12-311-2/+10
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* Change instrinsics header to what MSVC prefersJack Lloyd2020-12-281-1/+1
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* Add BMI2 3DES implementationJack Lloyd2020-12-277-0/+352
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* Improve the parity function a bitJack Lloyd2020-12-241-5/+6
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* Merge GH #2561 Use constant time code for bcrypt base64 conversionJack Lloyd2020-12-241-52/+59
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| * Use constant-time code for the bcrypt base64 decoding opJack Lloyd2020-12-231-52/+59
| | | | | | | | | | This would only leak the hashes so is not too terrible, but is easily avoidable.
* | Merge GH #2560 Use constant time code for parity byte calculationsJack Lloyd2020-12-241-24/+9
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| * | Don't use a lookup table for parity calculationsJack Lloyd2020-12-231-24/+9
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* / Use const time code to choose which ASN.1 string encoding to useJack Lloyd2020-12-231-29/+21
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* Use a single Sbox table for WhirlpoolJack Lloyd2020-12-223-618/+205
| | | | | | This actually only degrades performance slightly, and Whirlpool is already quite slow. Saves 14K of ROM and probably lessens side channel risk a bit.
* Move parity LUT to global namespaceJack Lloyd2020-12-221-24/+28
| | | | As MinGW doesn't like giving larger alignment to local vars
* Deprecate OctetString::set_odd_parityJack Lloyd2020-12-222-0/+7
| | | | What decade is this anyway
* Align some more tablesJack Lloyd2020-12-224-5/+5
| | | | | The bcrypt tables aren't lookup tables but aligning them makes the loads within Blowfish a bit faster.
* Merge GH #2557 Add ARMv8 version of SHACAL2Jack Lloyd2020-12-215-6/+144
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| * Unroll by 2xJack Lloyd2020-12-211-2/+45
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| * Add SHACAL2 using ARMv8 SHA instructionsJack Lloyd2020-12-215-6/+101
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* | Avoid magic constantsJack Lloyd2020-12-201-2/+2
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* | Convert ASN1_Tag to an enum classJack Lloyd2020-12-2054-450/+497
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* Compare also order and cofactor in EC_Group::operator==Jack Lloyd2020-12-202-11/+9
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* Align SHA-2 constantsJack Lloyd2020-12-202-19/+19
| | | | | This allows using the aligned load instruction from SSE2 though that doesn't seem to make any difference on performance.
* Remove duplicated SHACAL2 testsJack Lloyd2020-12-201-8/+0
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* Use the correct ppc64 SigmaJack Lloyd2020-12-191-2/+2
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* Optimize and cleanup SHACAL2Jack Lloyd2020-12-194-22/+71
| | | | | | | The SHA-2 Ch and Maj functions can be done very fast on both AltiVec and NEON. Also, we can take advantage of the POWER8 SHA-2 extensions here.
* Remove unused functionsJack Lloyd2020-12-191-15/+0
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* Simplify DES IP/FP codeJack Lloyd2020-12-191-53/+103
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* Slight Noekeon simplificationJack Lloyd2020-12-192-4/+4
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* Make error handling more consistent hereJack Lloyd2020-12-182-3/+9
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* Fix attemptJack Lloyd2020-12-161-2/+2
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* Toggle VSX flag for ppc64 GHASHJack Lloyd2020-12-161-0/+1
| | | | Seems Clang really wants this in order to create a __vector unsigned long
* Add a ppc64 clang build to CIJack Lloyd2020-12-161-0/+6
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* Fix build on ppc64 with clangJack Lloyd2020-12-161-6/+10
| | | | GH #2547
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