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* Full working amalgamation build, plus internal-only headers concept.lloyd2009-12-169-17/+59
* Consolidate the non-canonical epoch timers, like cpuid and Win32'slloyd2009-12-013-1/+118
* Make sure the SIMD_32 implementation we're using actually works on thelloyd2009-11-243-3/+3
* Instead of having two asm_macr.h files being switched in based on modulelloyd2009-11-144-8/+0
* Use memcpy for bulk loads if algorithm endianness matches CPU endianess.lloyd2009-11-101-0/+9
* Also #undef bool after including <altivec.h>lloyd2009-11-101-0/+1
* Rename CPUID::has_intel_aes to has_aes_intel, and add CPUID::has_aes_via,lloyd2009-11-101-2/+11
* Tick to 1.9.3-devlloyd2009-11-063-28/+15
* Add an andc operation, in SSE2 and AltiVec, may be useful for Serpent sboxeslloyd2009-11-044-4/+22
* Slight cleanups in the Altivec detection code for readability.lloyd2009-10-291-5/+12
* Add a new looping load_be / load_le for loading large arrays at once, andlloyd2009-10-291-0/+46
* Fix cpuid with icc (tested with 11.1)lloyd2009-10-291-2/+2
* Give each version of SIMD_32 a public bswap()lloyd2009-10-293-11/+29
* Add new function enabled() to each of the SIMD_32 instantiations which lloyd2009-10-293-1/+9
* No ||= operator!lloyd2009-10-291-7/+7
* Add CPUID::have_altivec for AltiVec runtime detection.lloyd2009-10-292-0/+61
* Use register writes in the Altivec code for stores because Altivec's handlinglloyd2009-10-291-7/+16
* Kill realnames on new modules not in mailinelloyd2009-10-291-2/+0
* propagate from branch 'net.randombit.botan' (head 8fb69dd1c599ada1008c4cab2a6...lloyd2009-10-295-0/+575
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| * Add copyright + license on the new SIMD fileslloyd2009-10-284-2/+14
| * Add an AltiVec SIMD_32 implementation. Tested and works for Serpent and XTEAlloyd2009-10-281-0/+178
| * Define SSE rotate_right in terms of rotate left, and load_be in termslloyd2009-10-281-3/+2
| * Add subtraction operators to SIMD_32 classes, needed for XTEA decryptlloyd2009-10-262-0/+26
| * Add a wrapper for a set of SSE2 operations with convenient syntax for 4x32lloyd2009-10-264-0/+360
* | Remove the 'realname' attribute on all modules and cc/cpu/os info files.lloyd2009-10-295-10/+0
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* Add ; after call to VC++'s __cpuid, not a macrolloyd2009-10-251-1/+1
* Cast the u32bit output array to an int* when calling the VC++ intrinsic,lloyd2009-10-251-3/+6
* Add new store_[l|b]e variants taking 8 values.lloyd2009-10-231-16/+108
* Enable CPUID on x86 (checking wrong macro name)lloyd2009-10-211-1/+1
* In to_u32bit, ignore space characters in inputlloyd2009-10-061-0/+3
* Clean up cpuid callinglloyd2009-10-061-32/+26
* Disable prefetch in AES for now. Problem: with iterative modes like CBC,lloyd2009-09-301-12/+0
* Add cpuid check for Intel AESlloyd2009-09-301-1/+8
* Add vendor ID for AMDlloyd2009-09-291-1/+1
* Significantly rework CPUID support. Add cache line detectionlloyd2009-09-292-87/+99
* Change the prefetching interface; move to PREFETCH namespace, and add alloyd2009-09-291-9/+25
* Remove add block from utils/info.txtlloyd2009-09-291-27/+0
* Add some basic prefetching support (only supported with GNU C++ or thingslloyd2009-09-294-3/+44
* merge of '1efb42e84eca9e01edd7b7f1335af7011eab994c'lloyd2009-09-253-0/+161
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| * Add runtime cpuid support. Check in the SSE2 engine that SSE2 is actuallylloyd2009-09-253-0/+161
* | Add engine deps on the asm_xxx modules so the engines get loadedlloyd2009-09-242-0/+8
* | propagate from branch 'net.randombit.botan.1_8' (head 1f4729658b70a340064bc9a...lloyd2009-09-176-110/+70
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| * Split up util.h into 3 fileslloyd2009-09-173-65/+4
| * Move memory locking function decls to mlock.hlloyd2009-09-175-25/+46
* | Fix macro generation + checks in configure.py and bswap.h. Had the effectlloyd2009-09-171-2/+2
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* Add a new option --no-autoload to configure.py. This will produce a minimallloyd2009-09-041-1/+1
* Fix variable name in 32-bit bswap for VC++lloyd2009-08-031-1/+1
* A typo in a macro check in bswap.h meant inline asm bswap was notlloyd2009-07-311-1/+1
* Add missing info.txt fileslloyd2009-07-162-0/+24
* Correct source listings for moved fileslloyd2009-07-161-2/+0