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* Detect (though not using) the CPUID bit for the RDRAND instructionlloyd2011-06-161-1/+8
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* s/u32bit/size_t/ in utilslloyd2010-10-131-2/+2
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* Add support in CPUID for detecting PCMULUDQ and MOVBE instructions.lloyd2010-07-271-4/+18
| | | | Rename CPUID::has_aes_intel to has_aes_ni.
* Modify CPUID so all the check functions are purely inline. Add a newlloyd2010-07-261-9/+16
| | | | | initialize() call which must be called prior to use of any other functions.
* Simplify feature checkslloyd2010-06-281-7/+12
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* Add detection support for upcoming AVXlloyd2010-06-251-1/+8
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* Doxygenlloyd2010-06-211-9/+9
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* More Doxygen updates/fixeslloyd2010-06-151-0/+3
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* Use "/*" instead of "/**" in starting comments at the begining of a file.lloyd2010-06-071-1/+1
| | | | | This caused Doxygen to think this was markup meant for it, which really caused some clutter in the namespace page.
* Remove stubs for VIA Padlock support. I have no plans to implement itlloyd2010-01-051-7/+1
| | | | | | and don't even have access to a VIA with AES so could not test it anyway. If someone else wants to do it, then the implementation for AES-NI should provide a good template.
* Add missing BOTAN_DLL exports.lloyd2009-12-161-1/+1
| | | | Move most of the engine headers to internal
* Rename CPUID::has_intel_aes to has_aes_intel, and add CPUID::has_aes_via,lloyd2009-11-101-2/+11
| | | | which is currently just a stub returning false.
* Add CPUID::have_altivec for AltiVec runtime detection.lloyd2009-10-291-0/+1
| | | | | Relies on mfspr emulation/trapping by the kernel, which works on (at least) Linux and NetBSD.
* Add cpuid check for Intel AESlloyd2009-09-301-1/+8
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* Significantly rework CPUID support. Add cache line detectionlloyd2009-09-291-26/+42
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* Add runtime cpuid support. Check in the SSE2 engine that SSE2 is actuallylloyd2009-09-251-0/+51
existing on the current CPU before returning an object.