aboutsummaryrefslogtreecommitdiffstats
path: root/src/lib/utils/simd
Commit message (Collapse)AuthorAgeFilesLines
* Fix handling of misaligned loads in AltiVec SIMD wrapperJack Lloyd2018-02-231-22/+12
| | | | Handling little+big endian is a PITA, easier to bounce though a union here
* Enable using NEON on ClangJack Lloyd2017-12-101-14/+15
| | | | | Clang doesn't like the way SIMD shifts were implemented, I guess it fails to inline the constant. Make it a template parameter instead.
* Add compile-time rotation functionsJack Lloyd2017-10-121-42/+45
| | | | | | | | | | | | | | | | | The problem with asm rol/ror is the compiler can't schedule effectively. But we only need asm in the case when the rotation is variable, so distinguish the two cases. If a compile time constant, then static_assert that the rotation is in the correct range and do the straightforward expression knowing the compiler will probably do the right thing. Otherwise do a tricky expression that both GCC and Clang happen to have recognize. Avoid the reduction case; instead require that the rotation be in range (this reverts 2b37c13dcf). Remove the asm rotations (making this branch illnamed), because now both Clang and GCC will create a roll without any extra help. Remove the reduction/mask by the word size for the variable case. The compiler can't optimize that it out well, but it's easy to ensure it is valid in the callers, especially now that the variable input cases are easy to grep for.
* Change header guard format to BOTAN_FOO_H_Jack Lloyd2017-09-201-2/+2
| | | | | | ISO C++ reserves names with double underscores in them Closes #512
* Minor simplifications in SIMD_32 constructorJack Lloyd2017-09-161-2/+5
|
* Fix bug affecting AltiVec on ppc64le processorsJack Lloyd2017-08-231-8/+2
|
* Add SHACAL2 in generic SIMDJack Lloyd2017-08-131-0/+58
| | | | Bit over 2x faster on my desktop
* Remove "Dirty hack" for multiple defines in lex_me_harder()Simon Warta2017-04-021-1/+3
|
* Blind fixJack Lloyd2017-01-301-1/+1
|
* Transpose for 32-bit NEONJack Lloyd2017-01-291-1/+19
| | | | Different intrinsics API
* Workaround for MSVC 2013Jack Lloyd2017-01-291-2/+5
|
* Add support for NEON in SIMD_4x32Jack Lloyd2017-01-291-190/+342
| | | | Tested on qemu-aarch64
* Fix various SunCC and Solaris warnings and build problems.Jack Lloyd2017-01-241-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | Based on build output sent by @noloader. If RLIMIT_MEMLOCK is not defined, assume regular user is not able to call mlock. This probably also affected Clang/GCC on Solaris. Work around resolution issue in SIMD_4x32 where it finds ambiguity between arg taking uint32_t and __m128i. This is probably some artifact of how SunCC represents vector types, and seems highly bogus in general but is easy to work around here. Change constructor taking a single value to instead be `SIMD_4x32::splat` function. The SIMD class is internal, so no API implications. Fix various warnings about lambda functions that were missing return types and which were not a single return statement. AIUI C++11 doesn't guarantee that lambda return type will be deduced in that situation, though in practice every compiler including SunCC seems to handle it. Disable AVX2 usage, since SunCC's intrinsics seem to be broken - its _mm_loadu_si256 takes non-const pointer. Rename a few variables in the tests to avoid shadowed var warnings.
* Convert to using standard uintN_t integer typesJack Lloyd2016-12-181-9/+9
| | | | | | Renames a couple of functions for somewhat better name consistency, eg make_u32bit becomes make_uint32. The old typedefs remain for now since probably lots of application code uses them.
* Fix some problems on ppc64leJack Lloyd2016-08-301-1/+9
| | | | Altivec code assumed big-endian.
* SSE2 had been disabled for testing, missed it on checkin of 6907e196Jack Lloyd2016-07-251-1/+1
|
* Merge asm into single mp_madd.h and mp_asmi.h filesJack Lloyd2016-07-218-633/+459
| | | | | | | Avoids some cut and paste, also removes the need for special logic in configure.py for handling mp module specially. Merge SIMD classes into a single type SIMD_4x32
* cppcheck fixes: Class 'X' has a constructor with 1 argument that is not ↵Daniel Neus2016-03-051-14/+14
| | | | explicit.
* Mass-prefix member vars with m_René Korthaus2016-01-081-30/+30
|
* Remove bogus code from generic mp_madd header, noticed on PPC build.Jack Lloyd2015-11-231-2/+2
| | | | Also fix a few cast and zero-as-nullptr warnings in the AltiVec header
* Move check for SIMD instructions to CPUIDJack Lloyd2015-09-213-6/+0
| | | | | | Avoids needing to include simd_32 to see if SIMD is disabled. This had caused a build break on Linux x86-32 as SSE2 must be enabled on a per-file basis.
* Remove algo factory, engines, global RNG, global state, etc.lloyd2015-02-048-0/+663
Convert all uses of Algorithm_Factory and the engines to using Algo_Registry The shared pool of entropy sources remains but is moved to EntropySource. With that and few remaining initializations (default OIDs and aliases) moved elsewhere, the global state is empty and init and shutdown are no-ops. Remove almost all of the headers and code for handling the global state, except LibraryInitializer which remains as a compatability stub. Update seeding for blinding so only one hacky almost-global RNG instance needs to be setup instead of across all pubkey uses (it uses either the system RNG or an AutoSeeded_RNG if the system RNG is not available).