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Diffstat (limited to 'src/utils/cpuid.h')
-rw-r--r-- | src/utils/cpuid.h | 153 |
1 files changed, 0 insertions, 153 deletions
diff --git a/src/utils/cpuid.h b/src/utils/cpuid.h deleted file mode 100644 index 1c4c1df0b..000000000 --- a/src/utils/cpuid.h +++ /dev/null @@ -1,153 +0,0 @@ -/* -* Runtime CPU detection -* (C) 2009-2010,2013 Jack Lloyd -* -* Distributed under the terms of the Botan license -*/ - -#ifndef BOTAN_CPUID_H__ -#define BOTAN_CPUID_H__ - -#include <botan/types.h> -#include <iosfwd> - -namespace Botan { - -/** -* A class handling runtime CPU feature detection -*/ -class BOTAN_DLL CPUID - { - public: - /** - * Probe the CPU and see what extensions are supported - */ - static void initialize(); - - /** - * Return a best guess of the cache line size - */ - static size_t cache_line_size() { return m_cache_line_size; } - - /** - * Check if the processor supports RDTSC - */ - static bool has_rdtsc() - { return x86_processor_flags_has(CPUID_RDTSC_BIT); } - - /** - * Check if the processor supports SSE2 - */ - static bool has_sse2() - { return x86_processor_flags_has(CPUID_SSE2_BIT); } - - /** - * Check if the processor supports SSSE3 - */ - static bool has_ssse3() - { return x86_processor_flags_has(CPUID_SSSE3_BIT); } - - /** - * Check if the processor supports SSE4.1 - */ - static bool has_sse41() - { return x86_processor_flags_has(CPUID_SSE41_BIT); } - - /** - * Check if the processor supports SSE4.2 - */ - static bool has_sse42() - { return x86_processor_flags_has(CPUID_SSE42_BIT); } - - /** - * Check if the processor supports AVX2 - */ - static bool has_avx2() - { return x86_processor_flags_has(CPUID_AVX2_BIT); } - - /** - * Check if the processor supports AVX-512F - */ - static bool has_avx512f() - { return x86_processor_flags_has(CPUID_AVX512F_BIT); } - - /** - * Check if the processor supports BMI2 - */ - static bool has_bmi2() - { return x86_processor_flags_has(CPUID_BMI2_BIT); } - - /** - * Check if the processor supports AES-NI - */ - static bool has_aes_ni() - { return x86_processor_flags_has(CPUID_AESNI_BIT); } - - /** - * Check if the processor supports CLMUL - */ - static bool has_clmul() - { return x86_processor_flags_has(CPUID_CLMUL_BIT); } - - /** - * Check if the processor supports Intel SHA extension - */ - static bool has_intel_sha() - { return x86_processor_flags_has(CPUID_SHA_BIT); } - - /** - * Check if the processor supports ADX extension - */ - static bool has_adx() - { return x86_processor_flags_has(CPUID_ADX_BIT); } - - /** - * Check if the processor supports RDRAND - */ - static bool has_rdrand() - { return x86_processor_flags_has(CPUID_RDRAND_BIT); } - - /** - * Check if the processor supports RDSEED - */ - static bool has_rdseed() - { return x86_processor_flags_has(CPUID_RDSEED_BIT); } - - /** - * Check if the processor supports AltiVec/VMX - */ - static bool has_altivec() { return m_altivec_capable; } - - static void print(std::ostream& o); - private: - enum CPUID_bits { - CPUID_RDTSC_BIT = 4, - CPUID_SSE2_BIT = 26, - CPUID_CLMUL_BIT = 33, - CPUID_SSSE3_BIT = 41, - CPUID_SSE41_BIT = 51, - CPUID_SSE42_BIT = 52, - CPUID_AESNI_BIT = 57, - CPUID_RDRAND_BIT = 62, - - CPUID_AVX2_BIT = 64+5, - CPUID_BMI2_BIT = 64+8, - CPUID_AVX512F_BIT = 64+16, - CPUID_RDSEED_BIT = 64+18, - CPUID_ADX_BIT = 64+19, - CPUID_SHA_BIT = 64+29, - }; - - static bool x86_processor_flags_has(u64bit bit) - { - return ((m_x86_processor_flags[bit/64] >> (bit % 64)) & 1); - } - - static u64bit m_x86_processor_flags[2]; - static size_t m_cache_line_size; - static bool m_altivec_capable; - }; - -} - -#endif |