diff options
Diffstat (limited to 'src/lib/utils')
| -rw-r--r-- | src/lib/utils/cpuid/cpuid_arm.cpp | 10 | ||||
| -rw-r--r-- | src/lib/utils/cpuid/cpuid_ppc.cpp | 2 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/lib/utils/cpuid/cpuid_arm.cpp b/src/lib/utils/cpuid/cpuid_arm.cpp index 6c947c62b..b422de9d2 100644 --- a/src/lib/utils/cpuid/cpuid_arm.cpp +++ b/src/lib/utils/cpuid/cpuid_arm.cpp @@ -200,11 +200,11 @@ uint64_t CPUID::CPUID_Data::detect_cpu_features(size_t* cache_line_size) NEON registers v0-v7 are caller saved in Aarch64 */ - auto neon_probe = []() -> int { asm("and v0.16b, v0.16b, v0.16b"); return 1; }; - auto aes_probe = []() -> int { asm(".word 0x4e284800"); return 1; }; - auto pmull_probe = []() -> int { asm(".word 0x0ee0e000"); return 1; }; - auto sha1_probe = []() -> int { asm(".word 0x5e280800"); return 1; }; - auto sha2_probe = []() -> int { asm(".word 0x5e282800"); return 1; }; + auto neon_probe = []() noexcept -> int { asm("and v0.16b, v0.16b, v0.16b"); return 1; }; + auto aes_probe = []() noexcept -> int { asm(".word 0x4e284800"); return 1; }; + auto pmull_probe = []() noexcept -> int { asm(".word 0x0ee0e000"); return 1; }; + auto sha1_probe = []() noexcept -> int { asm(".word 0x5e280800"); return 1; }; + auto sha2_probe = []() noexcept -> int { asm(".word 0x5e282800"); return 1; }; // Only bother running the crypto detection if we found NEON diff --git a/src/lib/utils/cpuid/cpuid_ppc.cpp b/src/lib/utils/cpuid/cpuid_ppc.cpp index ff528d88e..4fb24f24b 100644 --- a/src/lib/utils/cpuid/cpuid_ppc.cpp +++ b/src/lib/utils/cpuid/cpuid_ppc.cpp @@ -86,7 +86,7 @@ uint64_t CPUID::CPUID_Data::detect_cpu_features(size_t* cache_line_size) (others, too, maybe?) will trap and emulate it for us. */ - int pvr = OS::run_cpu_instruction_probe([]() -> int { + int pvr = OS::run_cpu_instruction_probe([]() noexcept -> int { uint32_t pvr = 0; asm volatile("mfspr %0, 287" : "=r" (pvr)); // Top 16 bits suffice to identify the model |