diff options
| -rw-r--r-- | modules/tm_hard/modinfo.txt | 9 | ||||
| -rw-r--r-- | modules/tm_hard/tm_hard.cpp | 13 |
2 files changed, 19 insertions, 3 deletions
diff --git a/modules/tm_hard/modinfo.txt b/modules/tm_hard/modinfo.txt index 5c928cf83..d5583c0d7 100644 --- a/modules/tm_hard/modinfo.txt +++ b/modules/tm_hard/modinfo.txt @@ -21,8 +21,11 @@ athlon pentium4 amd64 -ppc # PPC timebase register -ppc64 # PPC timebase register -alpha # rpcc +ppc # PPC timebase register +ppc64 # PPC timebase register +alpha # rpcc sparc64 # %tick register +ia64 # ar.itc +s390x +hppa </arch> diff --git a/modules/tm_hard/tm_hard.cpp b/modules/tm_hard/tm_hard.cpp index 37746f48e..2f7516930 100644 --- a/modules/tm_hard/tm_hard.cpp +++ b/modules/tm_hard/tm_hard.cpp @@ -18,14 +18,27 @@ u64bit Hardware_Timer::clock() const u32bit rtc_low = 0, rtc_high = 0; asm volatile("rdtsc" : "=d" (rtc_high), "=a" (rtc_low)); rtc = (static_cast<u64bit>(rtc_high) << 32) | rtc_low; + #elif defined(BOTAN_TARGET_ARCH_IS_PPC) || defined(BOTAN_TARGET_ARCH_IS_PPC64) u32bit rtc_low = 0, rtc_high = 0; asm volatile("mftbu %0; mftb %1" : "=r" (rtc_high), "=r" (rtc_low)); rtc = (static_cast<u64bit>(rtc_high) << 32) | rtc_low; + #elif defined(BOTAN_TARGET_ARCH_IS_ALPHA) asm volatile("rpcc %0" : "=r" (rtc)); + #elif defined(BOTAN_TARGET_ARCH_IS_SPARC64) asm volatile("rd %%tick, %0" : "=r" (rtc)); + +#elif defined(BOTAN_TARGET_ARCH_IS_IA64) + asm volatile("mov %0=ar.itc" : "=r" (rtc)); + +#elif defined(BOTAN_TARGET_ARCH_IS_S390X) + asm volatile("stck 0(%0)" : : "a" (&rtc) : "memory", "cc"); + +#elif defined(BOTAN_TARGET_ARCH_IS_HPPA) + asm volatile("mfctl 16,%0" : "=r" (rtc)); // 64-bit only? + #else #error "Unsure how to access hardware timer on this system" #endif |