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-rwxr-xr-xconfigure.py134
-rw-r--r--doc/examples/cpuid.cpp1
-rw-r--r--doc/relnotes/1_11_4.rst3
-rw-r--r--src/build-data/arch/arm.txt7
-rw-r--r--src/build-data/arch/ppc32.txt6
-rw-r--r--src/build-data/arch/ppc64.txt6
-rw-r--r--src/build-data/arch/x86_32.txt14
-rw-r--r--src/build-data/arch/x86_64.txt26
-rw-r--r--src/build-data/buildh.in2
-rw-r--r--src/build-data/cc/clang.txt21
-rw-r--r--src/build-data/cc/gcc.txt37
-rw-r--r--src/build-data/cc/xlc.txt2
-rw-r--r--src/build-data/makefile/unix.in21
-rw-r--r--src/build-data/makefile/unix_shr.in26
-rw-r--r--src/simd/simd_altivec/simd_altivec.h2
-rw-r--r--src/simd/simd_sse2/simd_sse2.h2
-rw-r--r--src/utils/cpuid.h7
17 files changed, 140 insertions, 177 deletions
diff --git a/configure.py b/configure.py
index 82c705114..5133ef056 100755
--- a/configure.py
+++ b/configure.py
@@ -223,20 +223,14 @@ def process_command_line(args):
dest='unaligned_mem', action='store_false',
help=optparse.SUPPRESS_HELP)
- for isa_extn_name in ['SSE2', 'SSSE3', 'AltiVec', 'AES-NI', 'movbe']:
+ for isa_extn_name in ['SSE2', 'SSSE3', 'AltiVec', 'AES-NI']:
isa_extn = isa_extn_name.lower()
- target_group.add_option('--enable-%s' % (isa_extn),
- help='enable use of %s' % (isa_extn_name),
- action='append_const',
- const=isa_extn,
- dest='enable_isa_extns')
-
target_group.add_option('--disable-%s' % (isa_extn),
- help=optparse.SUPPRESS_HELP,
+ help='disable use of %s intrinsics' % (isa_extn_name),
action='append_const',
const=isa_extn,
- dest='disable_isa_extns')
+ dest='disable_intrinsics')
build_group = optparse.OptionGroup(parser, 'Build options')
@@ -419,33 +413,7 @@ def process_command_line(args):
options.enabled_modules = parse_multiple_enable(options.enabled_modules)
options.disabled_modules = parse_multiple_enable(options.disabled_modules)
- options.enable_isa_extns = parse_multiple_enable(options.enable_isa_extns)
- options.disable_isa_extns = parse_multiple_enable(options.disable_isa_extns)
-
- def enabled_or_disabled_isa(isa):
- if isa in options.enable_isa_extns:
- return True
- if isa in options.disable_isa_extns:
- return True
- return False
-
- isa_deps = {
- 'ssse3': 'sse2',
- 'aes-ni': 'sse2'
- }
-
- if 'sse2' in options.disable_isa_extns:
- for isa in [k for (k,v) in isa_deps.items() if v == 'sse2']:
- # If explicitly enabled, allow it even if a dependency
- # violation; trust the user to know what they want
- if not enabled_or_disabled_isa(isa):
- options.disable_isa_extns.append(isa)
-
- for isa in options.enable_isa_extns:
- if isa in isa_deps:
- for dep in isa_deps.get(isa, '').split(','):
- if not enabled_or_disabled_isa(dep):
- options.enable_isa_extns.append(dep)
+ options.disable_intrinsics = parse_multiple_enable(options.disable_intrinsics)
return options
@@ -629,14 +597,11 @@ class ModuleInfo(object):
return False
if self.need_isa != None:
- if self.need_isa in options.disable_isa_extns:
+ if self.need_isa in options.disable_intrinsics:
return False # explicitly disabled
- if self.need_isa in options.enable_isa_extns:
- return True # explicitly enabled
-
# Default to whatever the CPU is supposed to support
- return self.need_isa in archinfo.isa_extensions_in(cpu_name)
+ return self.need_isa in archinfo.isa_extensions
return True
@@ -674,34 +639,17 @@ class ModuleInfo(object):
class ArchInfo(object):
def __init__(self, infofile):
lex_me_harder(infofile, self,
- ['aliases', 'submodels', 'submodel_aliases', 'isa_extn'],
+ ['aliases', 'submodels', 'submodel_aliases', 'isa_extensions'],
{ 'endian': None,
'family': None,
'unaligned': 'no'
})
- def convert_isa_list(input):
- isa_info = {}
- for line in self.isa_extn:
- (isa,cpus) = line.split(':')
- for cpu in cpus.split(','):
- isa_info.setdefault(cpu, []).append(isa)
- return isa_info
-
- self.isa_extn = convert_isa_list(self.isa_extn)
-
self.submodel_aliases = force_to_dict(self.submodel_aliases)
self.unaligned_ok = (1 if self.unaligned == 'ok' else 0)
"""
- Return ISA extensions specific to this CPU
- """
- def isa_extensions_in(self, cpu_type):
- return sorted(self.isa_extn.get(cpu_type, []) +
- self.isa_extn.get('all', []))
-
- """
Return a list of all submodels for this arch, ordered longest
to shortest
"""
@@ -723,14 +671,13 @@ class ArchInfo(object):
if self.basename != options.cpu:
macros.append('TARGET_CPU_IS_%s' % (form_macro(options.cpu)))
- enabled_isas = set(self.isa_extensions_in(options.cpu) +
- options.enable_isa_extns)
- disabled_isas = set(options.disable_isa_extns)
+ enabled_isas = set(self.isa_extensions)
+ disabled_isas = set(options.disable_intrinsics)
isa_extensions = sorted(enabled_isas - disabled_isas)
for isa in isa_extensions:
- macros.append('TARGET_CPU_HAS_%s' % (form_macro(isa)))
+ macros.append('TARGET_SUPPORTS_%s' % (form_macro(isa)))
endian = options.with_endian or self.endian
@@ -754,7 +701,7 @@ class ArchInfo(object):
class CompilerInfo(object):
def __init__(self, infofile):
lex_me_harder(infofile, self,
- ['so_link_flags', 'mach_opt', 'mach_abi_linking'],
+ ['so_link_flags', 'mach_opt', 'mach_abi_linking', 'isa_flags'],
{ 'binary_name': None,
'macro_name': None,
'compile_option': '-c ',
@@ -778,6 +725,7 @@ class CompilerInfo(object):
self.so_link_flags = force_to_dict(self.so_link_flags)
self.mach_abi_linking = force_to_dict(self.mach_abi_linking)
+ self.isa_flags = force_to_dict(self.isa_flags)
self.mach_opt_flags = {}
@@ -833,37 +781,35 @@ class CompilerInfo(object):
return ''
return ' ' + ' '.join(abi_link)
- """
- Return the flags for MACH_OPT
- """
- def mach_opts(self, arch, submodel):
-
- def submodel_fixup(tup):
- return tup[0].replace('SUBMODEL', submodel.replace(tup[1], ''))
-
- if submodel == arch:
- return ''
-
- if submodel in self.mach_opt_flags:
- return submodel_fixup(self.mach_opt_flags[submodel])
- if arch in self.mach_opt_flags:
- return submodel_fixup(self.mach_opt_flags[arch])
-
- return ''
"""
- Return the flags for LIB_OPT
+ Return the optimization flags to use for the library
"""
def library_opt_flags(self, options):
def gen_flags():
if options.debug_build:
yield self.debug_flags
+ else:
+ yield self.no_debug_flags
- if not options.no_optimizations:
- yield self.lib_opt_flags
+ if options.no_optimizations:
+ return
+
+ yield self.lib_opt_flags
+
+ def submodel_fixup(flags, tup):
+ return tup[0].replace('SUBMODEL', flags.replace(tup[1], ''))
+
+ if options.cpu != options.arch:
+ if options.cpu in self.mach_opt_flags:
+ yield submodel_fixup(options.cpu, self.mach_opt_flags[options.cpu])
+ elif options.arch in self.mach_opt_flags:
+ yield submodel_fixup(options.cpu, self.mach_opt_flags[options.arch])
- if not options.debug_build:
- yield self.no_debug_flags
+ all_arch = 'all_%s' % (options.arch)
+
+ if all_arch in self.mach_opt_flags:
+ yield self.mach_opt_flags[all_arch][0]
return (' '.join(gen_flags())).strip()
@@ -1037,7 +983,6 @@ def create_template_vars(build_config, options, modules, cc, arch, osinfo):
yield os.path.join(obj_dir, name)
-
def choose_mp_bits():
mp_bits = [mod.mp_bits for mod in modules if mod.mp_bits != 0]
@@ -1051,16 +996,24 @@ def create_template_vars(build_config, options, modules, cc, arch, osinfo):
return mp_bits[0]
+ def isa_specific_flags(cc, src):
+ for mod in modules:
+ if src in mod.sources():
+ if mod.need_isa != None:
+ return cc.isa_flags[mod.need_isa]
+ return ''
+
"""
Form snippets of makefile for building each source file
"""
def build_commands(sources, obj_dir, flags):
for (obj_file,src) in zip(objectfile_list(sources, obj_dir), sources):
- yield '%s: %s\n\t$(CXX) %s%s $(%s_FLAGS) %s$? %s$@\n' % (
+ yield '%s: %s\n\t$(CXX) %s%s $(%s_FLAGS) %s %s$? %s$@\n' % (
obj_file, src,
cc.add_include_dir_option,
build_config.include_dir,
flags,
+ isa_specific_flags(cc, src),
cc.compile_option,
cc.output_to_option)
@@ -1143,7 +1096,6 @@ def create_template_vars(build_config, options, modules, cc, arch, osinfo):
options.cpu, options.debug_build),
'lib_opt': cc.library_opt_flags(options),
- 'mach_opt': cc.mach_opts(options.arch, options.cpu),
'check_opt': '' if options.no_optimizations else cc.check_opt_flags,
'lang_flags': cc.lang_flags,
'warn_flags': warning_flags(cc.warning_flags,
@@ -1832,7 +1784,7 @@ if __name__ == '__main__':
main()
except Exception as e:
logging.error(e)
- #import traceback
- #logging.info(traceback.format_exc())
+ import traceback
+ logging.debug(traceback.format_exc())
sys.exit(1)
sys.exit(0)
diff --git a/doc/examples/cpuid.cpp b/doc/examples/cpuid.cpp
index bd81e417b..ac3f50580 100644
--- a/doc/examples/cpuid.cpp
+++ b/doc/examples/cpuid.cpp
@@ -43,5 +43,4 @@ int main()
print_if_feature("PCMUL", CPUID::has_pcmuludq());
print_if_feature("AES-NI", CPUID::has_aes_ni());
print_if_feature("RDRND", CPUID::has_rdrand());
- print_if_feature("MOVBE", CPUID::has_movbe());
}
diff --git a/doc/relnotes/1_11_4.rst b/doc/relnotes/1_11_4.rst
new file mode 100644
index 000000000..a30db0699
--- /dev/null
+++ b/doc/relnotes/1_11_4.rst
@@ -0,0 +1,3 @@
+Version 1.11.4, Not Yet Released
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
diff --git a/src/build-data/arch/arm.txt b/src/build-data/arch/arm.txt
index b822fe130..627ccf25c 100644
--- a/src/build-data/arch/arm.txt
+++ b/src/build-data/arch/arm.txt
@@ -38,6 +38,7 @@ cortex-a8 -> armv7-a
cortex-a9 -> armv7-a
</submodel_aliases>
-<isa_extn>
-neon:armv7-a
-</isa_extn>
+<isa_extensions>
+neon
+</isa_extensions>
+
diff --git a/src/build-data/arch/ppc32.txt b/src/build-data/arch/ppc32.txt
index e33c8ff24..2f4ca6723 100644
--- a/src/build-data/arch/ppc32.txt
+++ b/src/build-data/arch/ppc32.txt
@@ -25,6 +25,6 @@ g4 -> ppc7450
powerpcspe -> e500v2 # for Debian
</submodel_aliases>
-<isa_extn>
-altivec:ppc7400,ppc7450
-</isa_extn>
+<isa_extensions>
+altivec
+</isa_extensions>
diff --git a/src/build-data/arch/ppc64.txt b/src/build-data/arch/ppc64.txt
index 954d9181e..07436c19d 100644
--- a/src/build-data/arch/ppc64.txt
+++ b/src/build-data/arch/ppc64.txt
@@ -24,6 +24,6 @@ cellppu
cellbroadbandengine -> cellppu
</submodel_aliases>
-<isa_extn>
-altivec:cellppu,ppc970,power6,power7
-</isa_extn>
+<isa_extensions>
+altivec
+</isa_extensions>
diff --git a/src/build-data/arch/x86_32.txt b/src/build-data/arch/x86_32.txt
index 482a53057..4562050af 100644
--- a/src/build-data/arch/x86_32.txt
+++ b/src/build-data/arch/x86_32.txt
@@ -61,8 +61,12 @@ intelcput2600 -> prescott
intelcput2700 -> prescott
</submodel_aliases>
-<isa_extn>
-sse2:pentium4,prescott,pentium-m,atom32
-ssse3:atom32
-movbe:atom32
-</isa_extn>
+<isa_extensions>
+sse2
+ssse3
+sse4.1
+sse4.2
+avx2
+aes-ni
+clmul
+</isa_extensions>
diff --git a/src/build-data/arch/x86_64.txt b/src/build-data/arch/x86_64.txt
index 8d74a193e..608249101 100644
--- a/src/build-data/arch/x86_64.txt
+++ b/src/build-data/arch/x86_64.txt
@@ -12,12 +12,11 @@ x64
<submodels>
k8
-k10
+barcelona
atom
nocona
core2
-nehalem
-westmere
+corei7
sandybridge
ivybridge
</submodels>
@@ -27,18 +26,21 @@ core2duo -> core2
intelcore2 -> core2
intelcore2duo -> core2
+nehalem -> corei7
+westmere -> corei7
+
sledgehammer -> k8
opteron -> k8
amdopteron -> k8
athlon64 -> k8
-barcelona -> k10
-
-corei5cpum520 -> westmere
-corei7cpu860 -> nehalem
</submodel_aliases>
-<isa_extn>
-sse2:all
-ssse3:core2,nehalem,westmere,atom,sandybridge,ivybridge
-aes-ni:westmere,sandybridge,ivybridge
-</isa_extn>
+<isa_extensions>
+sse2
+ssse3
+sse4.1
+sse4.2
+avx2
+aes-ni
+clmul
+</isa_extensions>
diff --git a/src/build-data/buildh.in b/src/build-data/buildh.in
index 8be48c295..4e206b192 100644
--- a/src/build-data/buildh.in
+++ b/src/build-data/buildh.in
@@ -7,7 +7,7 @@
* %{user}@%{hostname} running '%{command_line}'
*
* Target
-* - Compiler: %{cc} %{lib_opt} %{mach_opt}
+* - Compiler: %{cc} %{lib_opt}
* - Arch: %{submodel}/%{arch}
* - OS: %{os}
*/
diff --git a/src/build-data/cc/clang.txt b/src/build-data/cc/clang.txt
index 40bdb0a0b..0af44768b 100644
--- a/src/build-data/cc/clang.txt
+++ b/src/build-data/cc/clang.txt
@@ -1,5 +1,3 @@
-# Largely copied from the gcc config
-
macro_name CLANG
binary_name clang++
@@ -11,15 +9,15 @@ add_lib_dir_option -L
add_lib_option -l
lang_flags "-D_REENTRANT -std=c++11"
-warning_flags "-W -Wall"
+warning_flags "-Wextra -Wall"
makefile_style unix
lib_opt_flags "-O3"
check_opt_flags "-O2"
shared_flags "-fPIC"
-debug_flags -g
-no_debug_flags "-finline-functions"
+debug_flags "-g -fno-inline-functions"
+no_debug_flags ""
visibility_build_flags "-fvisibility=hidden"
visibility_attribute '__attribute__((visibility("default")))'
@@ -31,10 +29,17 @@ default -> "$(CXX) -shared -fPIC -Wl,-soname,$(SONAME)"
darwin -> "$(CXX) -dynamiclib -fPIC -install_name $(LIBDIR)/$(SONAME)"
</so_link_flags>
+<isa_flags>
+"aes-ni" -> "-maes"
+"ssse3" -> "-mssse3"
+"sse2" -> "-msse2"
+</isa_flags>
+
<mach_opt>
-x86_64 -> "-march=SUBMODEL"
-nehalem -> "-march=corei7"
-westmere -> "-march=corei7 -maes"
+x86_64 -> "-march=SUBMODEL"
+nehalem -> "-march=corei7"
+sandybridge -> "-march=corei7-avx"
+ivybridge -> "-march=core-avx-i"
</mach_opt>
<mach_abi_linking>
diff --git a/src/build-data/cc/gcc.txt b/src/build-data/cc/gcc.txt
index 59e9671f5..cfa223098 100644
--- a/src/build-data/cc/gcc.txt
+++ b/src/build-data/cc/gcc.txt
@@ -16,8 +16,7 @@ maintainer_warning_flags "-Werror -Wall -Wextra -Wstrict-aliasing -Wstrict-overf
lib_opt_flags "-O3"
check_opt_flags "-O2"
shared_flags "-fPIC"
-debug_flags -g
-no_debug_flags "-finline-functions"
+debug_flags "-g -fno-inline-functions"
visibility_build_flags "-fvisibility=hidden"
visibility_attribute '__attribute__((visibility("default")))'
@@ -39,22 +38,25 @@ hpux -> "$(CXX) -shared -fPIC -Wl,+h,$(SONAME)"
solaris -> "$(CXX) -shared -fPIC -Wl,-h,$(SONAME)"
</so_link_flags>
+<isa_flags>
+"sse2" -> "-msse2"
+"ssse3" -> "-mssse3"
+"sse4.1" -> "-msse4.1"
+"sse4.2" -> "-msse4.2"
+"avx" -> "-mavx"
+"aes-ni" -> "-maes"
+</isa_flags>
+
<mach_opt>
# Avoid using -march=i[345]86, instead tune for generic
-i386 -> "-mtune=generic -momit-leaf-frame-pointer"
-i486 -> "-mtune=generic -momit-leaf-frame-pointer"
-i586 -> "-mtune=generic -momit-leaf-frame-pointer"
+i386 -> "-mtune=generic"
+i486 -> "-mtune=generic"
+i586 -> "-mtune=generic"
# Translate to GCC-speak
-nehalem -> "-march=corei7 -momit-leaf-frame-pointer"
-westmere -> "-march=corei7 -maes -momit-leaf-frame-pointer"
-
-#nehalem -> "-march=core2 -msse4.1 -msse4.2 -momit-leaf-frame-pointer"
-#westmere -> "-march=core2 -msse4.1 -msse4.2 -maes -momit-leaf-frame-pointer"
-
-sandybridge -> "-march=corei7-avx -momit-leaf-frame-pointer"
-ivybridge -> "-march=core-avx-i -momit-leaf-frame-pointer"
-atom32 -> "-march=atom -momit-leaf-frame-pointer"
+nehalem -> "-march=corei7"
+sandybridge -> "-march=corei7-avx"
+ivybridge -> "-march=core-avx-i"
ppc601 -> "-mpowerpc -mcpu=601"
cellppu -> "-mcpu=cell"
@@ -83,8 +85,11 @@ ppc32 -> "-mcpu=SUBMODEL" ppc
ppc64 -> "-mcpu=SUBMODEL" ppc
sparc32 -> "-mcpu=SUBMODEL -Wa,-xarch=v8plus" sparc32-
sparc64 -> "-mcpu=v9 -mtune=SUBMODEL"
-x86_32 -> "-march=SUBMODEL -momit-leaf-frame-pointer"
-x86_64 -> "-march=SUBMODEL -momit-leaf-frame-pointer"
+x86_32 -> "-march=SUBMODEL"
+x86_64 -> "-march=SUBMODEL"
+
+all_x86_32 -> "-momit-leaf-frame-pointer"
+all_x86_64 -> "-momit-leaf-frame-pointer"
</mach_opt>
# The 'linking' bit means "use this for both compiling *and* linking"
diff --git a/src/build-data/cc/xlc.txt b/src/build-data/cc/xlc.txt
index 87b32746b..609439243 100644
--- a/src/build-data/cc/xlc.txt
+++ b/src/build-data/cc/xlc.txt
@@ -21,8 +21,6 @@ cellppu -> "-qarch=cell"
ppc970 -> "-qarch=ppc970"
power4 -> "-qarch=pwr4"
power5 -> "-qarch=pwr5"
-
-cellppu -> "-qarch=cell"
</mach_opt>
<so_link_flags>
diff --git a/src/build-data/makefile/unix.in b/src/build-data/makefile/unix.in
index 5290beda8..ca881d65d 100644
--- a/src/build-data/makefile/unix.in
+++ b/src/build-data/makefile/unix.in
@@ -7,6 +7,9 @@ LANG_FLAGS = %{lang_flags}
WARN_FLAGS = %{warn_flags}
LINK_TO = %{link_to}
+LIB_FLAGS = $(LIB_OPT) $(MACH_OPT) $(LANG_FLAGS) $(WARN_FLAGS)
+CHECK_FLAGS = $(CHECK_OPT) $(LANG_FLAGS) $(WARN_FLAGS)
+
# Version Numbers
VERSION = %{version}
SERIES = %{version_major}.%{version_minor}
@@ -38,6 +41,14 @@ RANLIB = %{ranlib_command}
RM = @rm -f
RM_R = @rm -rf
+# Targets
+LIBRARIES = $(STATIC_LIB)
+
+LIBNAME = %{lib_prefix}libbotan
+STATIC_LIB = $(LIBNAME)-$(SERIES).a
+
+all: $(LIBRARIES)
+
# File Lists
CHECK = %{check_prefix}check
@@ -47,16 +58,6 @@ LIBOBJS = %{lib_objs}
CHECKOBJS = %{check_objs}
-LIB_FLAGS = $(LIB_OPT) $(MACH_OPT) $(LANG_FLAGS) $(WARN_FLAGS)
-CHECK_FLAGS = $(CHECK_OPT) $(LANG_FLAGS) $(WARN_FLAGS)
-
-LIBRARIES = $(STATIC_LIB)
-
-LIBNAME = %{lib_prefix}libbotan
-STATIC_LIB = $(LIBNAME)-$(SERIES).a
-
-all: $(LIBRARIES)
-
# Build Commands
%{lib_build_cmds}
diff --git a/src/build-data/makefile/unix_shr.in b/src/build-data/makefile/unix_shr.in
index 31060afbb..806969a00 100644
--- a/src/build-data/makefile/unix_shr.in
+++ b/src/build-data/makefile/unix_shr.in
@@ -2,13 +2,15 @@
CXX = %{cc}
LIB_OPT = %{lib_opt}
CHECK_OPT = %{check_opt}
-MACH_OPT = %{mach_opt}
LANG_FLAGS = %{lang_flags}
WARN_FLAGS = %{warn_flags}
SO_OBJ_FLAGS = %{shared_flags}
SO_LINK_CMD = %{so_link}
LINK_TO = %{link_to}
+LIB_FLAGS = $(LIB_OPT) $(LANG_FLAGS) $(WARN_FLAGS) $(SO_OBJ_FLAGS)
+CHECK_FLAGS = $(CHECK_OPT) $(LANG_FLAGS) $(WARN_FLAGS)
+
# Version Numbers
VERSION = %{version}
SERIES = %{version_major}.%{version_minor}
@@ -40,18 +42,7 @@ RANLIB = %{ranlib_command}
RM = @rm -f
RM_R = @rm -rf
-# File Lists
-CHECK = %{check_prefix}check
-
-HEADERS = %{include_files}
-
-LIBOBJS = %{lib_objs}
-
-CHECKOBJS = %{check_objs}
-
-LIB_FLAGS = $(LIB_OPT) $(MACH_OPT) $(LANG_FLAGS) $(WARN_FLAGS) $(SO_OBJ_FLAGS)
-CHECK_FLAGS = $(CHECK_OPT) $(LANG_FLAGS) $(WARN_FLAGS)
-
+# Targets
LIBRARIES = $(STATIC_LIB) $(SHARED_LIB)
LIBNAME = %{lib_prefix}libbotan
@@ -64,6 +55,15 @@ SYMLINK = $(LIBNAME)-$(SERIES).%{so_suffix}
all: $(LIBRARIES)
+# File Lists
+CHECK = %{check_prefix}check
+
+HEADERS = %{include_files}
+
+LIBOBJS = %{lib_objs}
+
+CHECKOBJS = %{check_objs}
+
# Build Commands
%{lib_build_cmds}
diff --git a/src/simd/simd_altivec/simd_altivec.h b/src/simd/simd_altivec/simd_altivec.h
index 4c412ddec..f675587bc 100644
--- a/src/simd/simd_altivec/simd_altivec.h
+++ b/src/simd/simd_altivec/simd_altivec.h
@@ -8,7 +8,7 @@
#ifndef BOTAN_SIMD_ALTIVEC_H__
#define BOTAN_SIMD_ALTIVEC_H__
-#if defined(BOTAN_TARGET_CPU_HAS_ALTIVEC)
+#if defined(BOTAN_TARGET_SUPPORTS_ALTIVEC)
#include <botan/loadstor.h>
#include <botan/cpuid.h>
diff --git a/src/simd/simd_sse2/simd_sse2.h b/src/simd/simd_sse2/simd_sse2.h
index 61fce99a9..6cbed1df8 100644
--- a/src/simd/simd_sse2/simd_sse2.h
+++ b/src/simd/simd_sse2/simd_sse2.h
@@ -8,7 +8,7 @@
#ifndef BOTAN_SIMD_SSE_H__
#define BOTAN_SIMD_SSE_H__
-#if defined(BOTAN_TARGET_CPU_HAS_SSE2)
+#if defined(BOTAN_TARGET_SUPPORTS_SSE2)
#include <botan/cpuid.h>
#include <emmintrin.h>
diff --git a/src/utils/cpuid.h b/src/utils/cpuid.h
index cdc6417ec..14ac6ad39 100644
--- a/src/utils/cpuid.h
+++ b/src/utils/cpuid.h
@@ -77,12 +77,6 @@ class BOTAN_DLL CPUID
{ return x86_processor_flags_has(CPUID_PCMUL_BIT); }
/**
- * Check if the processor supports MOVBE
- */
- static bool has_movbe()
- { return x86_processor_flags_has(CPUID_MOVBE_BIT); }
-
- /**
* Check if the processor supports RDRAND
*/
static bool has_rdrand()
@@ -100,7 +94,6 @@ class BOTAN_DLL CPUID
CPUID_SSSE3_BIT = 41,
CPUID_SSE41_BIT = 51,
CPUID_SSE42_BIT = 52,
- CPUID_MOVBE_BIT = 54,
CPUID_AESNI_BIT = 57,
CPUID_AVX_BIT = 60,
CPUID_RDRAND_BIT = 62
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-21 10:13:08 +0000