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authorlloyd <[email protected]>2011-05-09 15:38:06 +0000
committerlloyd <[email protected]>2011-05-09 15:38:06 +0000
commit37b1ca2b6e12fc099e9afdc80c6de9da111eb657 (patch)
treef11371417721af0ed7ca12fa5b9ee65072051b16 /src
parent070e176e36ee9cdd100aef6b8a702c4f1bfa47b9 (diff)
Make different targets for 32 and 64 bit Atom processors, since most
consumer/desktop level Atoms are actually 32 bit.
Diffstat (limited to 'src')
-rw-r--r--src/build-data/arch/x86_32.txt8
-rw-r--r--src/build-data/arch/x86_64.txt3
-rw-r--r--src/build-data/cc/gcc.txt2
3 files changed, 7 insertions, 6 deletions
diff --git a/src/build-data/arch/x86_32.txt b/src/build-data/arch/x86_32.txt
index 9289f1b2e..482a53057 100644
--- a/src/build-data/arch/x86_32.txt
+++ b/src/build-data/arch/x86_32.txt
@@ -25,7 +25,7 @@ pentium-m
prescott
k6
athlon
-atom
+atom32
</submodels>
<submodel_aliases>
@@ -62,7 +62,7 @@ intelcput2700 -> prescott
</submodel_aliases>
<isa_extn>
-sse2:pentium4,prescott,pentium-m,atom
-ssse3:atom
-movbe:atom
+sse2:pentium4,prescott,pentium-m,atom32
+ssse3:atom32
+movbe:atom32
</isa_extn>
diff --git a/src/build-data/arch/x86_64.txt b/src/build-data/arch/x86_64.txt
index 59e48329a..97b84fbde 100644
--- a/src/build-data/arch/x86_64.txt
+++ b/src/build-data/arch/x86_64.txt
@@ -17,6 +17,7 @@ nocona
core2
nehalem
westmere
+atom
</submodels>
<submodel_aliases>
@@ -36,6 +37,6 @@ corei7cpu860 -> nehalem
<isa_extn>
sse2:all
-ssse3:core2,nehalem,westmere
+ssse3:core2,nehalem,westmere,atom
aes-ni:westmere
</isa_extn>
diff --git a/src/build-data/cc/gcc.txt b/src/build-data/cc/gcc.txt
index f75239666..fd7b26cad 100644
--- a/src/build-data/cc/gcc.txt
+++ b/src/build-data/cc/gcc.txt
@@ -49,7 +49,7 @@ sh4 -> "-m4 -mieee"
# Until GCC gets -march support for these models
nehalem -> "-march=core2 -msse4.1 -msse4.2"
westmere -> "-march=core2 -maes -msse4.1 -msse4.2"
-atom -> "-march=i686 -msse2 -mssse3"
+atom32 -> "-march=i686 -msse2 -mssse3"
cellppu -> ""
alpha-ev68 -> "-mcpu=ev6"
alpha-ev7 -> "-mcpu=ev6"