diff options
| author | Jack Lloyd <[email protected]> | 2018-05-27 13:18:22 -0400 |
|---|---|---|
| committer | Jack Lloyd <[email protected]> | 2018-05-27 13:18:22 -0400 |
| commit | 01d250f78644fccc1db0bdc8da6577fae90afe01 (patch) | |
| tree | 806a072f0d5c93b9d9e668641cf131ae11eacb54 /src/lib/utils/cpuid/cpuid_x86.cpp | |
| parent | 4f5e266ad895bbcf6adf970c06f3999324f1b2ec (diff) | |
| parent | 8df48e74987fb2ab3c97adb2b48c2cafc0ea381b (diff) | |
Merge GH #1584 Add BMI2 optimization for SHA-256
Diffstat (limited to 'src/lib/utils/cpuid/cpuid_x86.cpp')
| -rw-r--r-- | src/lib/utils/cpuid/cpuid_x86.cpp | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/src/lib/utils/cpuid/cpuid_x86.cpp b/src/lib/utils/cpuid/cpuid_x86.cpp index be6c75a55..5387a801e 100644 --- a/src/lib/utils/cpuid/cpuid_x86.cpp +++ b/src/lib/utils/cpuid/cpuid_x86.cpp @@ -121,6 +121,7 @@ uint64_t CPUID::detect_cpu_features(size_t* cache_line_size) X86_CPUID_SUBLEVEL(7, 0, cpuid); enum x86_CPUID_7_bits : uint64_t { + BMI1 = (1ULL << 3), AVX2 = (1ULL << 5), BMI2 = (1ULL << 8), AVX512F = (1ULL << 16), @@ -132,8 +133,18 @@ uint64_t CPUID::detect_cpu_features(size_t* cache_line_size) if(flags7 & x86_CPUID_7_bits::AVX2) features_detected |= CPUID::CPUID_AVX2_BIT; - if(flags7 & x86_CPUID_7_bits::BMI2) - features_detected |= CPUID::CPUID_BMI2_BIT; + if(flags7 & x86_CPUID_7_bits::BMI1) + { + features_detected |= CPUID::CPUID_BMI1_BIT; + /* + We only set the BMI2 bit if BMI1 is also supported, so BMI2 + code can safely use both extensions. No known processor + implements BMI2 but not BMI1. + */ + if(flags7 & x86_CPUID_7_bits::BMI2) + features_detected |= CPUID::CPUID_BMI2_BIT; + } + if(flags7 & x86_CPUID_7_bits::AVX512F) features_detected |= CPUID::CPUID_AVX512F_BIT; if(flags7 & x86_CPUID_7_bits::RDSEED) |