diff options
| author | Jack Lloyd <[email protected]> | 2017-04-10 11:25:01 -0400 |
|---|---|---|
| committer | Jack Lloyd <[email protected]> | 2017-05-20 11:14:19 -0400 |
| commit | 3468a30ecea9aec9893c992c95887fbac9028e65 (patch) | |
| tree | 8e2f273b5487e24ed67c7998631fec70729c1435 /src/lib/hash/sha1 | |
| parent | 832200d0caaa0c0ebff7348bb72be14146476872 (diff) | |
Small cleanups for ARM SHA code
Fix for new define syntax, remove old style casts.
Add some randomly generated longer SHA-256 vectors, previously had
precisely zero multiblock tests.
Diffstat (limited to 'src/lib/hash/sha1')
| -rw-r--r-- | src/lib/hash/sha1/sha1_armv8/info.txt | 4 | ||||
| -rw-r--r-- | src/lib/hash/sha1/sha1_armv8/sha1_armv8.cpp | 16 |
2 files changed, 12 insertions, 8 deletions
diff --git a/src/lib/hash/sha1/sha1_armv8/info.txt b/src/lib/hash/sha1/sha1_armv8/info.txt index 7377a938a..9c809756f 100644 --- a/src/lib/hash/sha1/sha1_armv8/info.txt +++ b/src/lib/hash/sha1/sha1_armv8/info.txt @@ -1,4 +1,6 @@ -define SHA1_ARMV8 20170117 +<defines> +SHA1_ARMV8 -> 20170117 +</defines> <arch> arm32 diff --git a/src/lib/hash/sha1/sha1_armv8/sha1_armv8.cpp b/src/lib/hash/sha1/sha1_armv8/sha1_armv8.cpp index 5ff921003..97e56bfd0 100644 --- a/src/lib/hash/sha1/sha1_armv8/sha1_armv8.cpp +++ b/src/lib/hash/sha1/sha1_armv8/sha1_armv8.cpp @@ -17,7 +17,7 @@ namespace Botan { */ //static BOTAN_FUNC_ISA("+crypto") -void SHA_160::sha1_armv8_compress_n(secure_vector<uint32_t>& digest, const uint8_t input[], size_t blocks) +void SHA_160::sha1_armv8_compress_n(secure_vector<uint32_t>& digest, const uint8_t input8[], size_t blocks) { uint32x4_t C0, C1, C2, C3; uint32x4_t ABCD, ABCD_SAVED; @@ -32,6 +32,9 @@ void SHA_160::sha1_armv8_compress_n(secure_vector<uint32_t>& digest, const uint8 ABCD = vld1q_u32(&digest[0]); E0 = digest[4]; + // Intermediate void* cast due to http://llvm.org/bugs/show_bug.cgi?id=20670 + const uint32_t* input32 = reinterpret_cast<const uint32_t*>(reinterpret_cast<const void*>(input8)); + while (blocks) { uint32x4_t MSG0, MSG1, MSG2, MSG3; @@ -41,11 +44,10 @@ void SHA_160::sha1_armv8_compress_n(secure_vector<uint32_t>& digest, const uint8 ABCD_SAVED = ABCD; E0_SAVED = E0; - // Intermediate void* cast due to http://llvm.org/bugs/show_bug.cgi?id=20670 - MSG0 = vld1q_u32((const uint32_t*)(const void*)(input + 0)); - MSG1 = vld1q_u32((const uint32_t*)(const void*)(input + 16)); - MSG2 = vld1q_u32((const uint32_t*)(const void*)(input + 32)); - MSG3 = vld1q_u32((const uint32_t*)(const void*)(input + 48)); + MSG0 = vld1q_u32(input32 + 0); + MSG1 = vld1q_u32(input32 + 4); + MSG2 = vld1q_u32(input32 + 8); + MSG3 = vld1q_u32(input32 + 12); MSG0 = vreinterpretq_u32_u8(vrev32q_u8(vreinterpretq_u8_u32(MSG0))); MSG1 = vreinterpretq_u32_u8(vrev32q_u8(vreinterpretq_u8_u32(MSG1))); @@ -191,7 +193,7 @@ void SHA_160::sha1_armv8_compress_n(secure_vector<uint32_t>& digest, const uint8 E0 += E0_SAVED; ABCD = vaddq_u32(ABCD_SAVED, ABCD); - input += 64; + input32 += 64/4; blocks--; } |