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authorSimon Warta <simon@warta.it>2015-06-26 11:28:13 +0200
committerSimon Warta <simon@warta.it>2015-06-27 11:15:18 +0200
commit4b70dbf7c24dc4f60349e96220601f6c55c81c52 (patch)
treeb20cb7ace806a5937444a926d597987588a9856b /src/lib/block/rc2/rc2.cpp
parent922336151782c42455d08cca787215b0a4e7b617 (diff)
lib/block: Convert &vec[0] to vec.data()
Diffstat (limited to 'src/lib/block/rc2/rc2.cpp')
-rw-r--r--src/lib/block/rc2/rc2.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/lib/block/rc2/rc2.cpp b/src/lib/block/rc2/rc2.cpp
index 54f85ce00..d1fc8a2e6 100644
--- a/src/lib/block/rc2/rc2.cpp
+++ b/src/lib/block/rc2/rc2.cpp
@@ -126,7 +126,7 @@ void RC2::key_schedule(const byte key[], size_t length)
0xFE, 0x7F, 0xC1, 0xAD };
secure_vector<byte> L(128);
- copy_mem(&L[0], key, length);
+ copy_mem(L.data(), key, length);
for(size_t i = length; i != 128; ++i)
L[i] = TABLE[(L[i-1] + L[i-length]) % 256];
@@ -137,7 +137,7 @@ void RC2::key_schedule(const byte key[], size_t length)
L[i] = TABLE[L[i+1] ^ L[i+length]];
K.resize(64);
- load_le<u16bit>(&K[0], &L[0], 64);
+ load_le<u16bit>(K.data(), L.data(), 64);
}
void RC2::clear()