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authorlloyd <[email protected]>2009-11-06 19:30:41 +0000
committerlloyd <[email protected]>2009-11-06 19:30:41 +0000
commit36486f1c11ffeb1b53bee1eb32a6200090b3012a (patch)
tree39cf3a19d4ba90f2daaa7544a6fcbb07431cd397 /src/hash/sha1_sse2
parent07412401c927e01da3504f0c2b7e94d4ac13ee33 (diff)
Add a new need_isa marker for info.txt that lets a module depend
on a particular ISA extension rather than a list of CPUs. Much easier to edit and audit, too. Add markers on the AES-NI code and SHA-1/SSE2. Serpent and XTEA don't need it because they are generic and only depend on simd_32 which will silenty swap out a scalar version if SSE2/AltiVec isn't enabled (since it turns out on supersclar processors just doing 4 blocks in parallel can be a win even in GPRs). Add pentium3 to the list of CPUs with rdtsc, was missing. Odd!
Diffstat (limited to 'src/hash/sha1_sse2')
-rw-r--r--src/hash/sha1_sse2/info.txt15
1 files changed, 2 insertions, 13 deletions
diff --git a/src/hash/sha1_sse2/info.txt b/src/hash/sha1_sse2/info.txt
index ee61076b4..7a380753d 100644
--- a/src/hash/sha1_sse2/info.txt
+++ b/src/hash/sha1_sse2/info.txt
@@ -1,19 +1,8 @@
define SHA1_SSE2
+need_isa sse2
+
<requires>
sha1
simd_engine
</requires>
-
-<arch>
-pentium-m
-pentium4
-prescott
-amd64
-</arch>
-
-<cc>
-gcc
-icc
-msvc
-</cc>