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authorlloyd <[email protected]>2009-11-06 19:30:41 +0000
committerlloyd <[email protected]>2009-11-06 19:30:41 +0000
commit36486f1c11ffeb1b53bee1eb32a6200090b3012a (patch)
tree39cf3a19d4ba90f2daaa7544a6fcbb07431cd397 /src/engine
parent07412401c927e01da3504f0c2b7e94d4ac13ee33 (diff)
Add a new need_isa marker for info.txt that lets a module depend
on a particular ISA extension rather than a list of CPUs. Much easier to edit and audit, too. Add markers on the AES-NI code and SHA-1/SSE2. Serpent and XTEA don't need it because they are generic and only depend on simd_32 which will silenty swap out a scalar version if SSE2/AltiVec isn't enabled (since it turns out on supersclar processors just doing 4 blocks in parallel can be a win even in GPRs). Add pentium3 to the list of CPUs with rdtsc, was missing. Odd!
Diffstat (limited to 'src/engine')
-rw-r--r--src/engine/aes_isa_eng/aes_isa_engine.cpp10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/engine/aes_isa_eng/aes_isa_engine.cpp b/src/engine/aes_isa_eng/aes_isa_engine.cpp
index 122ec0f6e..fa3b4ceab 100644
--- a/src/engine/aes_isa_eng/aes_isa_engine.cpp
+++ b/src/engine/aes_isa_eng/aes_isa_engine.cpp
@@ -27,12 +27,12 @@ AES_ISA_Engine::find_block_cipher(const SCAN_Name& request,
{
if(request.algo_name() == "AES-128")
return new AES_128_Intel;
-#if 0
+ /*
if(request.algo_name() == "AES-192")
return new AES_192_Intel;
if(request.algo_name() == "AES-256")
return new AES_256_Intel;
-#endif
+ */
}
#endif
@@ -40,11 +40,11 @@ AES_ISA_Engine::find_block_cipher(const SCAN_Name& request,
if(CPUID::has_via_aes())
{
if(request.algo_name() == "AES-128")
- return new AES_128_Via;
+ return new AES_128_VIA;
if(request.algo_name() == "AES-192")
- return new AES_192_Via;
+ return new AES_192_VIA;
if(request.algo_name() == "AES-256")
- return new AES_256_Via;
+ return new AES_256_VIA;
}
#endif