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authorlloyd <[email protected]>2009-11-06 14:58:00 +0000
committerlloyd <[email protected]>2009-11-06 14:58:00 +0000
commitf99ceb51d099c0c5dbbdbab53d16283ac40c0763 (patch)
treeef0ffc58486df79b05374fba4eaea42941e3ab54 /src/build-data/arch/arm.txt
parentbbe35ac3ad7a0d792a2011bb31704b58dfc7a31f (diff)
The code for handling SIMD ISA extensions actually works fine for general
ISA extensions (say, Intel's AES-NI, for instance) so change everything to reflect that. Also rename some of the amd64 models, and add entries for k10, nehalem, and westmere processors.
Diffstat (limited to 'src/build-data/arch/arm.txt')
-rw-r--r--src/build-data/arch/arm.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/build-data/arch/arm.txt b/src/build-data/arch/arm.txt
index 7f8799ad6..b247466e6 100644
--- a/src/build-data/arch/arm.txt
+++ b/src/build-data/arch/arm.txt
@@ -22,6 +22,6 @@ strongarm1110 -> strongarm1100
armv5tel -> xscale
</submodel_aliases>
-<simd>
+<isa_extn>
neon:cortex-a8,cortex-a9
-</simd>
+</isa_extn>