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authorlloyd <[email protected]>2006-08-13 16:00:54 +0000
committerlloyd <[email protected]>2006-08-13 16:00:54 +0000
commit2ebf2c637111f7b041bb2c47ccd0bb98f35e2e83 (patch)
treeba9c80398d4e789f6f5a1554a3c3909a072209a8 /modules/alg_ia32/sha1core.S
parent671061b187e594f3ce969ee8f10fa45f4ff70ff1 (diff)
Cleanups, and move the initial memory access to the beginning of each
MD5 round in an attempt to hide the latency a bit
Diffstat (limited to 'modules/alg_ia32/sha1core.S')
-rw-r--r--modules/alg_ia32/sha1core.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/modules/alg_ia32/sha1core.S b/modules/alg_ia32/sha1core.S
index 45f95947d..191686a7d 100644
--- a/modules/alg_ia32/sha1core.S
+++ b/modules/alg_ia32/sha1core.S
@@ -100,7 +100,7 @@ LOOP_UNTIL(ESI, IMM(80), .EXPANSION)
ADD(E, A) ; \
ADD3_IMM(E, T, MAGIC1) ; \
ROTR_IMM(A, 5) ;
-
+
#define F2_OR_F4(A, B, C, D, E, T, MSG, MAGIC) \
ROTL_IMM(A, 5) ; \
ADD(E, ARRAY4(EDI, MSG)) ; \