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authorJack Lloyd <[email protected]>2017-01-22 15:15:19 -0500
committerJack Lloyd <[email protected]>2017-01-22 15:15:19 -0500
commit8775c0ad6887d39e620191a758a44d86b07449b2 (patch)
tree4be2d72b04301490d4c5fa7ab441584875e225fa /configure.py
parentc58b07498a1fbd3678ede3006dc55502e1d862aa (diff)
Fix configure.py error when compiler doesn't support desired ISA flags
Seen with rarely tested compilers (Sun Studio, Intel, ...) that we are missing info for. Previously this led to a hard error which is pointless. Instead just disable the relevant module and warn the user that something was disabled, if they want to go look into why. Remove bogus clmul entry in x86_64 - actually we lump both AES and CLMUL flags under the same ISA ("aesni") since all known CPUs support either both or neither. Caught by new configure warning. Add Sun Studio ISA flags from GH #846
Diffstat (limited to 'configure.py')
-rwxr-xr-xconfigure.py24
1 files changed, 15 insertions, 9 deletions
diff --git a/configure.py b/configure.py
index 3d4924ec5..7559f75ec 100755
--- a/configure.py
+++ b/configure.py
@@ -829,7 +829,7 @@ class ArchInfo(object):
[k for k in self.submodel_aliases.items()],
key=lambda k: len(k[0]), reverse=True)
- def defines(self, options):
+ def defines(self, cc, options):
"""
Return CPU-specific defines for build.h
"""
@@ -837,8 +837,9 @@ class ArchInfo(object):
def form_macro(cpu_name):
return cpu_name.upper().replace('.', '').replace('-', '_')
- macros = ['TARGET_ARCH_IS_%s' %
- (form_macro(self.basename.upper()))]
+ macros = []
+
+ macros.append('TARGET_ARCH_IS_%s' % (form_macro(self.basename.upper())))
if self.basename != options.cpu:
macros.append('TARGET_CPU_IS_%s' % (form_macro(options.cpu)))
@@ -849,7 +850,10 @@ class ArchInfo(object):
isa_extensions = sorted(enabled_isas - disabled_isas)
for isa in isa_extensions:
- macros.append('TARGET_SUPPORTS_%s' % (form_macro(isa)))
+ if cc.isa_flags_for(isa, self.basename) is not None:
+ macros.append('TARGET_SUPPORTS_%s' % (form_macro(isa)))
+ else:
+ logging.warning("Disabling support for %s intrinsics due to missing flag for compiler" % (isa))
endian = options.with_endian or self.endian
@@ -1333,10 +1337,12 @@ def gen_makefile_lists(var, build_config, options, modules, cc, arch, osinfo):
def isa_specific_flags(cc, src):
def simd_dependencies():
- if 'sse2' in arch.isa_extensions:
- return ['sse2']
- elif 'altivec' in arch.isa_extensions:
- return ['altivec']
+
+ for simd32_impl in ['sse2', 'altivec']:
+ if simd32_impl in arch.isa_extensions and cc.isa_flags_for(simd32_impl, arch.basename) is not None:
+ return [simd32_impl]
+
+ # default scalar
return []
for mod in modules:
@@ -1583,7 +1589,7 @@ def create_template_vars(build_config, options, modules, cc, arch, osinfo):
'target_compiler_defines': make_cpp_macros(cc.defines()),
- 'target_cpu_defines': make_cpp_macros(arch.defines(options)),
+ 'target_cpu_defines': make_cpp_macros(arch.defines(cc, options)),
'botan_include_dir': build_config.botan_include_dir,