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authorlloyd <[email protected]>2010-08-22 02:56:05 +0000
committerlloyd <[email protected]>2010-08-22 02:56:05 +0000
commite008f5673a5b9e2af0c78a2d6e0d95671b865343 (patch)
treec35bdfe801af1bcb1bd80ca0a8536a9172b8f1dd /configure.py
parente7d9701a86658efbc316ccfeaf48cec8c094fc35 (diff)
Add support for Atom processors.
Fix a bug that would cause a harmless but bogus macro to be generated in build.h if you used --enable-sse2 Add --enable-movbe to turn on a macro marking movbe as available
Diffstat (limited to 'configure.py')
-rwxr-xr-xconfigure.py15
1 files changed, 7 insertions, 8 deletions
diff --git a/configure.py b/configure.py
index a4fa0e27f..acb0f267c 100755
--- a/configure.py
+++ b/configure.py
@@ -160,7 +160,7 @@ def process_command_line(args):
dest='unaligned_mem', action='store_false',
help=SUPPRESS_HELP)
- for isa_extn_name in ['SSE2', 'SSSE3', 'AltiVec', 'AES-NI']:
+ for isa_extn_name in ['SSE2', 'SSSE3', 'AltiVec', 'AES-NI', 'movbe']:
isa_extn = isa_extn_name.lower()
target_group.add_option('--enable-%s' % (isa_extn),
@@ -348,9 +348,10 @@ def process_command_line(args):
options.disable_isa_extns.append(isa)
for isa in options.enable_isa_extns:
- for dep in isa_deps.get(isa, '').split(','):
- if not enabled_or_disabled_isa(dep):
- options.enable_isa_extns.append(dep)
+ if isa in isa_deps:
+ for dep in isa_deps.get(isa, '').split(','):
+ if not enabled_or_disabled_isa(dep):
+ options.enable_isa_extns.append(dep)
return options
@@ -609,10 +610,8 @@ class ArchInfo(object):
if self.basename != options.cpu:
macros.append('TARGET_CPU_IS_%s' % (form_macro(options.cpu)))
- enabled_isas = set(flatten(
- [self.isa_extensions_in(options.cpu),
- options.enable_isa_extns]))
-
+ enabled_isas = set(self.isa_extensions_in(options.cpu) +
+ options.enable_isa_extns)
disabled_isas = set(options.disable_isa_extns)
isa_extensions = sorted(enabled_isas - disabled_isas)