diff options
author | lloyd <lloyd@randombit.net> | 2009-11-06 13:45:18 +0000 |
---|---|---|
committer | lloyd <lloyd@randombit.net> | 2009-11-06 13:45:18 +0000 |
commit | f3c92264410c709e2a3ebf88ea3a67badf298c1c (patch) | |
tree | 08052c5615015cee4bfd14783ae48f3f694188d5 | |
parent | 56c3c044215f36fe00c9a8a2e06a84f969996cb7 (diff) |
Generate SIMD macro flags for build.h from data in build-data/arch for
SSE2, SSSE3, NEON, and AltiVec.
Add entries for Intel Atom, POWER6 and POWER7, and the Cortex A8 and A9.
-rwxr-xr-x | configure.py | 49 | ||||
-rw-r--r-- | src/build-data/arch/amd64.txt | 5 | ||||
-rw-r--r-- | src/build-data/arch/arm.txt | 6 | ||||
-rw-r--r-- | src/build-data/arch/ia32.txt | 6 | ||||
-rw-r--r-- | src/build-data/arch/ppc.txt | 4 | ||||
-rw-r--r-- | src/build-data/arch/ppc64.txt | 6 |
6 files changed, 70 insertions, 6 deletions
diff --git a/configure.py b/configure.py index 93192abdd..a0f9ec9d6 100755 --- a/configure.py +++ b/configure.py @@ -423,12 +423,22 @@ class ModuleInfo(object): class ArchInfo(object): def __init__(self, infofile): lex_me_harder(infofile, self, - ['aliases', 'submodels', 'submodel_aliases'], + ['aliases', 'submodels', 'submodel_aliases', 'simd'], { 'default_submodel': None, 'endian': None, 'unaligned': 'no' }) + def convert_simd(input): + simd_info = {} + for line in self.simd: + (simd,cpus) = line.split(':') + for cpu in cpus.split(','): + simd_info.setdefault(cpu, []).append(simd) + return simd_info + + self.simd = convert_simd(self.simd) + self.submodel_aliases = force_to_dict(self.submodel_aliases) if self.unaligned == 'ok': @@ -436,11 +446,23 @@ class ArchInfo(object): else: self.unaligned_ok = 0 + """ + Return the types of SIMD supported by this submodel (if any) + """ + def simd_in(self, cpu_type): + return self.simd.get(cpu_type, []) + self.simd.get('all', []) + + """ + Return a list of all submodels for this arch + """ def all_submodels(self): return sorted(zip(self.submodels, self.submodels) + self.submodel_aliases.items(), key = lambda k: len(k[0]), reverse = True) + """ + Return CPU-specific defines for build.h + """ def defines(self, target_submodel, with_endian, unaligned_ok): macros = ['TARGET_ARCH_IS_%s' % (self.basename.upper())] @@ -463,8 +485,8 @@ class ArchInfo(object): logging.info('Assuming unaligned memory access works on this CPU') macros.append('TARGET_UNALIGNED_LOADSTOR_OK %d' % (unaligned_ok)) - if self.basename == 'amd64': - macros.append('TARGET_CPU_HAS_SSE2') + for simd in self.simd_in(target_submodel): + macros.append('TARGET_CPU_HAS_%s' % (simd.upper())) return macros @@ -514,7 +536,9 @@ class CompilerInfo(object): del self.mach_opt - + """ + Return the machine specific ABI flags + """ def mach_abi_link_flags(self, osname, arch, submodel): abi_link = set() @@ -526,6 +550,9 @@ class CompilerInfo(object): return '' return ' ' + ' '.join(abi_link) + """ + Return the flags for MACH_OPT + """ def mach_opts(self, arch, submodel): def submodel_fixup(tup): @@ -541,6 +568,9 @@ class CompilerInfo(object): return '' + """ + Return the flags for LIB_OPT + """ def library_opt_flags(self, debug_build): flags = self.lib_opt_flags if debug_build and self.debug_flags != '': @@ -549,11 +579,17 @@ class CompilerInfo(object): flags += ' ' + self.no_debug_flags return flags + """ + Return the command needed to link a shared object + """ def so_link_command_for(self, osname): if osname in self.so_link_flags: return self.so_link_flags[osname] return self.so_link_flags['default'] + """ + Return defines for build.h + """ def defines(self, with_tr1): def tr1_macro(): @@ -1123,9 +1159,10 @@ def main(argv = None): logging.info('Guessing target processor is a %s/%s' % ( options.arch, options.cpu)) else: + cpu_from_user = options.cpu (options.arch, options.cpu) = canon_processor(archinfo, options.cpu) - logging.debug('Canonicalizized --cpu to %s/%s' % ( - options.arch, options.cpu)) + logging.info('Canonicalizized --cpu=%s to %s/%s' % ( + cpu_from_user, options.arch, options.cpu)) logging.info('Target is %s-%s-%s-%s' % ( options.compiler, options.os, options.arch, options.cpu)) diff --git a/src/build-data/arch/amd64.txt b/src/build-data/arch/amd64.txt index 96da0e3a9..f4012c150 100644 --- a/src/build-data/arch/amd64.txt +++ b/src/build-data/arch/amd64.txt @@ -23,3 +23,8 @@ amdopteron -> opteron athlon64 -> opteron k8 -> opteron </submodel_aliases> + +<simd> +sse2:all +ssse3:core2 +</simd> diff --git a/src/build-data/arch/arm.txt b/src/build-data/arch/arm.txt index 5f05d4cad..7f8799ad6 100644 --- a/src/build-data/arch/arm.txt +++ b/src/build-data/arch/arm.txt @@ -11,6 +11,8 @@ strongarm strongarm110 strongarm1100 xscale +cortex-a8 +cortex-a9 </submodels> <submodel_aliases> @@ -19,3 +21,7 @@ sa1100 -> strongarm1100 strongarm1110 -> strongarm1100 armv5tel -> xscale </submodel_aliases> + +<simd> +neon:cortex-a8,cortex-a9 +</simd> diff --git a/src/build-data/arch/ia32.txt b/src/build-data/arch/ia32.txt index 0fe665e68..62a7070e5 100644 --- a/src/build-data/arch/ia32.txt +++ b/src/build-data/arch/ia32.txt @@ -22,6 +22,7 @@ pentium-m prescott k6 athlon +atom </submodels> <submodel_aliases> @@ -56,3 +57,8 @@ intelcput2500 -> prescott intelcput2600 -> prescott intelcput2700 -> prescott </submodel_aliases> + +<simd> +sse2:pentium4,prescott,pentium-m,atom +ssse3:atom +</simd> diff --git a/src/build-data/arch/ppc.txt b/src/build-data/arch/ppc.txt index 254643fdd..5e96be3c3 100644 --- a/src/build-data/arch/ppc.txt +++ b/src/build-data/arch/ppc.txt @@ -21,3 +21,7 @@ ppc750 ppc7400 ppc7450 </submodels> + +<simd> +altivec:ppc7400,ppc7450 +</simd> diff --git a/src/build-data/arch/ppc64.txt b/src/build-data/arch/ppc64.txt index f044ba98d..9602012ed 100644 --- a/src/build-data/arch/ppc64.txt +++ b/src/build-data/arch/ppc64.txt @@ -16,9 +16,15 @@ ppc970 power3 power4 power5 +power6 +power7 cellppu </submodels> <submodel_aliases> cellbroadbandengine -> cellppu </submodel_aliases> + +<simd> +altivec:cellppu,ppc970,power6,power7 +</simd> |