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authorlloyd <[email protected]>2006-08-13 15:23:48 +0000
committerlloyd <[email protected]>2006-08-13 15:23:48 +0000
commit06ac56113eebe754114fa1da9334bcdc261165c2 (patch)
tree1e0bc3548e7f03e0a062cc3780b4386653277471
parent0afb997b4d73c1a3c9609fabb30ba5657806c1f4 (diff)
Minor formatting changes, reorder one instruction
-rw-r--r--modules/alg_ia32/sha1core.S4
1 files changed, 1 insertions, 3 deletions
diff --git a/modules/alg_ia32/sha1core.S b/modules/alg_ia32/sha1core.S
index 7dc86fa0d..45f95947d 100644
--- a/modules/alg_ia32/sha1core.S
+++ b/modules/alg_ia32/sha1core.S
@@ -36,7 +36,6 @@ START_LOOP(.LOAD_INPUT)
ASSIGN(ARRAY4_INDIRECT(EDI,ESI,-3), EBX)
ASSIGN(ARRAY4_INDIRECT(EDI,ESI,-2), ECX)
ASSIGN(ARRAY4_INDIRECT(EDI,ESI,-1), EDX)
-
LOOP_UNTIL(ESI, IMM(16), .LOAD_INPUT)
ADD2_IMM(EBP, EDI, 64)
@@ -45,7 +44,6 @@ START_LOOP(.EXPANSION)
ADD_IMM(ESI, 4)
ZEROIZE(EAX)
-
ASSIGN(EBX, ARRAY4(EBP, -1))
ASSIGN(ECX, ARRAY4(EBP, -2))
ASSIGN(EDX, ARRAY4(EBP, -3))
@@ -119,8 +117,8 @@ LOOP_UNTIL(ESI, IMM(80), .EXPANSION)
ADD(E, ARRAY4(EDI, MSG)) ; \
ASSIGN(T, B) ; \
OR(T, C) ; \
- ASSIGN(ARRAY4(EDI, MSG), B) ; \
AND(T, D) ; \
+ ASSIGN(ARRAY4(EDI, MSG), B) ; \
AND(ARRAY4(EDI, MSG), C) ; \
OR(T, ARRAY4(EDI, MSG)) ; \
ROTR_IMM(B, 2) ; \