Add a new need_isa marker for info.txt that lets a module depend

on a particular ISA extension rather than a list of CPUs. Much
easier to edit and audit, too. Add markers on the AES-NI code and
SHA-1/SSE2. Serpent and XTEA don't need it because they are
generic and only depend on simd_32 which will silenty swap out a
scalar version if SSE2/AltiVec isn't enabled (since it turns out
on supersclar processors just doing 4 blocks in parallel can be a
win even in GPRs).

Add pentium3 to the list of CPUs with rdtsc, was missing. Odd!

6 files changed, 31 insertions, 25 deletions

diff --git a/configure.py b/configure.py
index 5e19b421b..47aadfcd2 100755
--- a/configure.py
+++ b/configure.py
@@ -369,6 +369,7 @@ class ModuleInfo(object):
                         'define': None,
                         'modset': None,
                         'uses_tr1': 'false',
+                        'need_isa': None,
                         'note': '',
                         'mp_bits': 0 })
 
@@ -403,8 +404,20 @@ class ModuleInfo(object):
         else:
             self.uses_tr1 = False
 
-    def compatible_cpu(self, arch, cpu):
-        return self.arch == [] or (arch in self.arch or cpu in self.arch)
+    def compatible_cpu(self, archinfo, cpu_name):
+
+        arch_name = archinfo.basename
+
+        if self.arch != []:
+            if arch_name not in self.arch and cpu_name not in self.arch:
+                return False
+
+        if self.need_isa != None:
+            cpu_isa = archinfo.isa_extensions_in(cpu_name)
+            if self.need_isa not in cpu_isa:
+                return False
+
+        return True
 
     def compatible_os(self, os):
         return self.os == [] or os in self.os
@@ -887,7 +900,7 @@ def create_template_vars(build_config, options, modules, cc, arch, osinfo):
 """
 Determine which modules to load based on options, target, etc
 """
-def choose_modules_to_use(options, modules):
+def choose_modules_to_use(modules, archinfo, options):
 
     to_load = []
     maybe_dep = []
@@ -902,7 +915,7 @@ def choose_modules_to_use(options, modules):
         elif modname in options.enabled_modules:
             to_load.append(modname) # trust the user
 
-        elif not module.compatible_cpu(options.arch, options.cpu):
+        elif not module.compatible_cpu(archinfo, options.cpu):
             cannot_use_because(modname, 'CPU incompatible')
         elif not module.compatible_os(options.os):
             cannot_use_because(modname, 'OS incompatible')
@@ -1212,7 +1225,9 @@ def main(argv = None):
         else:
             options.with_tr1 = 'none'
 
-    modules_to_use = choose_modules_to_use(options, modules)
+    modules_to_use = choose_modules_to_use(modules,
+                                           archinfo[options.arch],
+                                           options)
 
     build_config = BuildConfigurationInformation(options, modules_to_use)
     build_config.headers.append(
diff --git a/src/block/aes_intel/info.txt b/src/block/aes_intel/info.txt
index 1a156a635..6e67a6ed9 100644
--- a/src/block/aes_intel/info.txt
+++ b/src/block/aes_intel/info.txt
@@ -2,7 +2,7 @@ define AES_INTEL
 
 load_on auto
 
-#isa aes_ni
+need_isa aes_ni
 
 <requires>
 aes_isa_eng
diff --git a/src/build-data/arch/amd64.txt b/src/build-data/arch/amd64.txt
index 6bce86dff..6c1c2a7e4 100644
--- a/src/build-data/arch/amd64.txt
+++ b/src/build-data/arch/amd64.txt
@@ -29,6 +29,6 @@ barcelona -> k10
 
 <isa_extn>
 sse2:all
-ssse3:core2
+ssse3:core2,nehalem,westmere
 aes_ni:westmere
 </isa_extn>
diff --git a/src/engine/aes_isa_eng/aes_isa_engine.cpp b/src/engine/aes_isa_eng/aes_isa_engine.cpp
index 122ec0f6e..fa3b4ceab 100644
--- a/src/engine/aes_isa_eng/aes_isa_engine.cpp
+++ b/src/engine/aes_isa_eng/aes_isa_engine.cpp
@@ -27,12 +27,12 @@ AES_ISA_Engine::find_block_cipher(const SCAN_Name& request,
       {
       if(request.algo_name() == "AES-128")
          return new AES_128_Intel;
-#if 0
+      /*
       if(request.algo_name() == "AES-192")
          return new AES_192_Intel;
       if(request.algo_name() == "AES-256")
          return new AES_256_Intel;
-#endif
+      */
       }
 #endif
 
@@ -40,11 +40,11 @@ AES_ISA_Engine::find_block_cipher(const SCAN_Name& request,
    if(CPUID::has_via_aes())
       {
       if(request.algo_name() == "AES-128")
-         return new AES_128_Via;
+         return new AES_128_VIA;
       if(request.algo_name() == "AES-192")
-         return new AES_192_Via;
+         return new AES_192_VIA;
       if(request.algo_name() == "AES-256")
-         return new AES_256_Via;
+         return new AES_256_VIA;
       }
 #endif
 
diff --git a/src/hash/sha1_sse2/info.txt b/src/hash/sha1_sse2/info.txt
index ee61076b4..7a380753d 100644
--- a/src/hash/sha1_sse2/info.txt
+++ b/src/hash/sha1_sse2/info.txt
@@ -1,19 +1,8 @@
 define SHA1_SSE2
 
+need_isa sse2
+
 <requires>
 sha1
 simd_engine
 </requires>
-
-<arch>
-pentium-m
-pentium4
-prescott
-amd64
-</arch>
-
-<cc>
-gcc
-icc
-msvc
-</cc>
diff --git a/src/timer/cpu_counter/info.txt b/src/timer/cpu_counter/info.txt
index d95e0fec5..2ab1343bc 100644
--- a/src/timer/cpu_counter/info.txt
+++ b/src/timer/cpu_counter/info.txt
@@ -12,10 +12,12 @@ gcc
 </cc>
 
 <arch>
+
 # RDTSC: Pentium and up
 i586
 i686
 athlon
+pentium3
 pentium4
 pentium-m
 amd64