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authormaxd <[email protected]>2017-01-11 16:47:01 +0100
committerBradley Sepos <[email protected]>2017-01-11 11:41:12 -0500
commit78db4231c66f169c6c1ee7d19f75cc39140364ea (patch)
tree9bc1b4e5e898732d2c9cbefe542c7fdfa8ef771f /libhb
parent6dca3affae8d899f34b66a7a91729593cf0e2626 (diff)
added support of Kaby Lake CPU recognition
Diffstat (limited to 'libhb')
-rw-r--r--libhb/ports.c7
-rw-r--r--libhb/ports.h1
-rw-r--r--libhb/qsv_common.c3
3 files changed, 10 insertions, 1 deletions
diff --git a/libhb/ports.c b/libhb/ports.c
index 4a555fc56..afc5c59c9 100644
--- a/libhb/ports.c
+++ b/libhb/ports.c
@@ -274,7 +274,8 @@ const char* hb_get_cpu_platform_name()
return "Intel microarchitecture Skylake";
case HB_CPU_PLATFORM_INTEL_CHT:
return "Intel microarchitecture Airmont";
-
+ case HB_CPU_PLATFORM_INTEL_KBL:
+ return "Intel microarchitecture Kaby Lake";
default:
return NULL;
}
@@ -361,6 +362,10 @@ static void init_cpu_info()
case 0x5E:
hb_cpu_info.platform = HB_CPU_PLATFORM_INTEL_SKL;
break;
+ case 0x8E:
+ case 0x9E:
+ hb_cpu_info.platform = HB_CPU_PLATFORM_INTEL_KBL;
+ break;
default:
break;
}
diff --git a/libhb/ports.h b/libhb/ports.h
index 69507847e..b1b478d5f 100644
--- a/libhb/ports.h
+++ b/libhb/ports.h
@@ -40,6 +40,7 @@ enum hb_cpu_platform
HB_CPU_PLATFORM_INTEL_BDW,
HB_CPU_PLATFORM_INTEL_CHT,
HB_CPU_PLATFORM_INTEL_SKL,
+ HB_CPU_PLATFORM_INTEL_KBL,
};
int hb_get_cpu_count();
int hb_get_cpu_platform();
diff --git a/libhb/qsv_common.c b/libhb/qsv_common.c
index 3d8e7a275..a54a40654 100644
--- a/libhb/qsv_common.c
+++ b/libhb/qsv_common.c
@@ -109,6 +109,7 @@ enum
QSV_G3, // Haswell or equivalent
QSV_G4, // Broadwell or equivalent
QSV_G5, // Skylake or equivalent
+ QSV_G6, // Kaby Lake or equivalent
QSV_FU, // always last (future processors)
};
static int qsv_hardware_generation(int cpu_platform)
@@ -129,6 +130,8 @@ static int qsv_hardware_generation(int cpu_platform)
return QSV_G4;
case HB_CPU_PLATFORM_INTEL_SKL:
return QSV_G5;
+ case HB_CPU_PLATFORM_INTEL_KBL:
+ return QSV_G6;
default:
return QSV_FU;
}