qsv: adding LowPower support for AVC and HEVC encode on the appropriate HW generations

6 files changed, 42 insertions, 9 deletions

diff --git a/libhb/enc_qsv.c b/libhb/enc_qsv.c
index 7b1236184..55478cf7d 100644
--- a/libhb/enc_qsv.c
+++ b/libhb/enc_qsv.c
@@ -1248,8 +1248,9 @@ int encqsvInit(hb_work_object_t *w, hb_job_t *job)
     }
 
     // log code path and main output settings
-    hb_log("encqsvInit: using %s path",
-           pv->is_sys_mem ? "encode-only" : "full QSV");
+    hb_log("encqsvInit: using %s%s path",
+           pv->is_sys_mem ? "encode-only" : "full QSV",
+           videoParam.mfx.LowPower == MFX_CODINGOPTION_ON ? " (LowPower)" : "" );
     hb_log("encqsvInit: %s %s profile @ level %s",
            hb_qsv_codec_name  (videoParam.mfx.CodecId),
            hb_qsv_profile_name(videoParam.mfx.CodecId, videoParam.mfx.CodecProfile),
diff --git a/libhb/ports.c b/libhb/ports.c
index 8da7c2274..0ad98ad53 100644
--- a/libhb/ports.c
+++ b/libhb/ports.c
@@ -261,8 +261,6 @@ const char* hb_get_cpu_platform_name()
 {
     switch (hb_cpu_info.platform)
     {
-        // Intel 64 and IA-32 Architectures Software Developer's Manual, Vol. 3C
-        // Table 35-1: CPUID Signature Values of DisplayFamily_DisplayModel
         case HB_CPU_PLATFORM_INTEL_BNL:
             return "Intel microarchitecture Bonnell";
         case HB_CPU_PLATFORM_INTEL_SNB:
@@ -281,6 +279,8 @@ const char* hb_get_cpu_platform_name()
             return "Intel microarchitecture Airmont";
         case HB_CPU_PLATFORM_INTEL_KBL:
             return "Intel microarchitecture Kaby Lake";
+        case HB_CPU_PLATFORM_INTEL_ICL:
+            return "Intel microarchitecture Ice Lake";
         default:
             return NULL;
     }
@@ -319,8 +319,8 @@ static void init_cpu_info()
         family = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
         model  = ((eax >> 4) & 0xf) + ((eax >> 12) & 0xf0);
 
-        // Intel 64 and IA-32 Architectures Software Developer's Manual, Vol. 3C
-        // Table 35-1: CPUID Signature Values of DisplayFamily_DisplayModel
+        // Intel 64 and IA-32 Architectures Software Developer's Manual, Volume 4/January 2019
+        // Table 2-1. CPUID Signature Values of DisplayFamily_DisplayModel
         switch (family)
         {
             case 0x06:
@@ -371,6 +371,8 @@ static void init_cpu_info()
                     case 0x9E:
                         hb_cpu_info.platform = HB_CPU_PLATFORM_INTEL_KBL;
                         break;
+                    case 0x7E:
+                        hb_cpu_info.platform = HB_CPU_PLATFORM_INTEL_ICL;
                     default:
                         break;
                 }
diff --git a/libhb/ports.h b/libhb/ports.h
index c6b045cde..e1eef623d 100644
--- a/libhb/ports.h
+++ b/libhb/ports.h
@@ -73,6 +73,7 @@ enum hb_cpu_platform
     HB_CPU_PLATFORM_INTEL_CHT,
     HB_CPU_PLATFORM_INTEL_SKL,
     HB_CPU_PLATFORM_INTEL_KBL,
+    HB_CPU_PLATFORM_INTEL_ICL,
 };
 int         hb_get_cpu_count(void);
 int         hb_get_cpu_platform(void);
diff --git a/libhb/preset.c b/libhb/preset.c
index b135475e7..4eb45254c 100644
--- a/libhb/preset.c
+++ b/libhb/preset.c
@@ -1763,7 +1763,12 @@ int hb_preset_apply_video(const hb_dict_t *preset, hb_dict_t *job_dict)
         hb_dict_set(qsv, "Decode",
                     hb_value_xform(value, HB_VALUE_TYPE_BOOL));
     }
-    if ((value = hb_dict_get(preset, "VideoQSVAsyncDepth")) != NULL)
+    if ((value = hb_dict_get(preset, "VideoQSVLowPower")) != NULL)
+    {
+        hb_dict_set(qsv, "LowPower",
+                    hb_value_xform(value, HB_VALUE_TYPE_BOOL));
+    }
+     if ((value = hb_dict_get(preset, "VideoQSVAsyncDepth")) != NULL)
     {
         hb_dict_set(qsv, "AsyncDepth",
                     hb_value_xform(value, HB_VALUE_TYPE_INT));
diff --git a/libhb/qsv_common.c b/libhb/qsv_common.c
index 58b1b0dcb..a4322bcd6 100644
--- a/libhb/qsv_common.c
+++ b/libhb/qsv_common.c
@@ -112,6 +112,7 @@ enum
     QSV_G4, // Broadwell or equivalent
     QSV_G5, // Skylake or equivalent
     QSV_G6, // Kaby Lake or equivalent
+    QSV_G7, // Ice Lake or equivalent
     QSV_FU, // always last (future processors)
 };
 static int qsv_hardware_generation(int cpu_platform)
@@ -134,6 +135,8 @@ static int qsv_hardware_generation(int cpu_platform)
             return QSV_G5;
         case HB_CPU_PLATFORM_INTEL_KBL:
             return QSV_G6;
+        case HB_CPU_PLATFORM_INTEL_ICL:
+            return QSV_G7;
         default:
             return QSV_FU;
     }
@@ -375,7 +378,12 @@ static int query_capabilities(mfxSession session, mfxVersion version, hb_qsv_inf
                 {
                     info->capabilities |= HB_QSV_CAP_B_REF_PYRAMID;
                 }
-            }
+                if (info->codec_id == MFX_CODEC_HEVC &&
+                    qsv_hardware_generation(hb_get_cpu_platform()) >= QSV_G7)
+                {
+                    info->capabilities |= HB_QSV_CAP_LOWPOWER_ENCODE;
+                }
+             }
             else
             {
                 if (HB_CHECK_MFX_VERSION(version, 1, 6))
@@ -1571,7 +1579,22 @@ int hb_qsv_param_parse(hb_qsv_param_t *param, hb_qsv_info_t *info,
             return HB_QSV_PARAM_UNSUPPORTED;
         }
     }
-    else
+    else if (!strcasecmp(key, "lowpower"))
+    {
+        if (info->capabilities & HB_QSV_CAP_LOWPOWER_ENCODE)
+        {
+            ivalue = hb_qsv_atobool(value, &error);
+            if (!error)
+            {
+                param->videoParam->mfx.LowPower = ivalue ? MFX_CODINGOPTION_ON : MFX_CODINGOPTION_OFF;
+            }
+        }
+        else
+        {
+            return HB_QSV_PARAM_UNSUPPORTED;
+        }
+    }
+     else
     {
         /*
          * TODO:
diff --git a/libhb/qsv_common.h b/libhb/qsv_common.h
index 74e071ef2..dedc8a3fe 100644
--- a/libhb/qsv_common.h
+++ b/libhb/qsv_common.h
@@ -48,6 +48,7 @@ typedef struct hb_qsv_info_s
 #define HB_QSV_CAP_MSDK_API_1_6      (1LL <<  0)
     // H.264, H.265: B-frames can be used as references
 #define HB_QSV_CAP_B_REF_PYRAMID     (1LL <<  1)
+#define HB_QSV_CAP_LOWPOWER_ENCODE   (1LL <<  2)
     // mfxExtVideoSignalInfo
 #define HB_QSV_CAP_VUI_VSINFO        (1LL <<  3)
     // optional rate control methods